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authorDavid Howells <dhowells@redhat.com>2012-03-12 23:36:56 +0000
committerBob Liu <lliubbo@gmail.com>2012-03-21 11:00:08 +0800
commit3bed8d67469cc7129b0babc0211c32fa68408ce0 (patch)
treec0d49ca0813d61e2c4f266b7da9dcc244bf8bee5 /arch/blackfin/include/asm/barrier.h
parent0eceb82f55a9e3756cada9e60ecc3a9b7b5979f5 (diff)
Disintegrate asm/system.h for Blackfin [ver #2]
Disintegrate asm/system.h for Blackfin. Signed-off-by: David Howells <dhowells@redhat.com> cc: uclinux-dist-devel@blackfin.uclinux.org Signed-off-by: Bob Liu <lliubbo@gmail.com>
Diffstat (limited to 'arch/blackfin/include/asm/barrier.h')
-rw-r--r--arch/blackfin/include/asm/barrier.h48
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/blackfin/include/asm/barrier.h b/arch/blackfin/include/asm/barrier.h
new file mode 100644
index 000000000000..ebb189507dd7
--- /dev/null
+++ b/arch/blackfin/include/asm/barrier.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2004-2009 Analog Devices Inc.
+ * Tony Kou (tonyko@lineo.ca)
+ *
+ * Licensed under the GPL-2 or later
+ */
+
+#ifndef _BLACKFIN_BARRIER_H
+#define _BLACKFIN_BARRIER_H
+
+#include <asm/cache.h>
+
+#define nop() __asm__ __volatile__ ("nop;\n\t" : : )
+
+/*
+ * Force strict CPU ordering.
+ */
+#ifdef CONFIG_SMP
+
+#ifdef __ARCH_SYNC_CORE_DCACHE
+/* Force Core data cache coherence */
+# define mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
+# define rmb() do { barrier(); smp_check_barrier(); } while (0)
+# define wmb() do { barrier(); smp_mark_barrier(); } while (0)
+# define read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
+#else
+# define mb() barrier()
+# define rmb() barrier()
+# define wmb() barrier()
+# define read_barrier_depends() do { } while (0)
+#endif
+
+#else /* !CONFIG_SMP */
+
+#define mb() barrier()
+#define rmb() barrier()
+#define wmb() barrier()
+#define read_barrier_depends() do { } while (0)
+
+#endif /* !CONFIG_SMP */
+
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+#define set_mb(var, value) do { var = value; mb(); } while (0)
+#define smp_read_barrier_depends() read_barrier_depends()
+
+#endif /* _BLACKFIN_BARRIER_H */