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authorLinus Torvalds <torvalds@linux-foundation.org>2011-05-28 23:12:28 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-05-28 23:12:28 -0700
commit139f37f5e14cd883eee2a8a36289f544b5390a44 (patch)
tree90598e62f04fbbaab94ff8fefe5a2f92f5c85f52 /arch/blackfin/include/asm/bfin_serial.h
parent5be7ef002469eaf757065ee16b4100c6d3ead1cc (diff)
parentc320afe965bf3f857249d223801d8f2fc95615c2 (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: Blackfin: debug-mmrs: include RSI_PID[4567] MMRs Blackfin: bf51x: fix up RSI_PID# MMR defines Blackfin: bf52x/bf54x: fix up usb MMR defines Blackfin: debug-mmrs: fix typos with gptimers/mdma/ppi Blackfin: gptimers: add structure for hardware register layout Blackfin: wire up new sendmmsg syscall Blackfin: mach/bfin_serial_5xx.h: punt now-unused header Blackfin: bfin_serial.h: turn default port wrappers into stubs
Diffstat (limited to 'arch/blackfin/include/asm/bfin_serial.h')
-rw-r--r--arch/blackfin/include/asm/bfin_serial.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/blackfin/include/asm/bfin_serial.h b/arch/blackfin/include/asm/bfin_serial.h
index 7dbc664eab1e..7fd0ec7b5b0f 100644
--- a/arch/blackfin/include/asm/bfin_serial.h
+++ b/arch/blackfin/include/asm/bfin_serial.h
@@ -184,7 +184,7 @@ struct bfin_uart_regs {
#undef __BFP
#ifndef port_membase
-# define port_membase(p) (((struct bfin_serial_port *)(p))->port.membase)
+# define port_membase(p) 0
#endif
#define UART_GET_CHAR(p) bfin_read16(port_membase(p) + OFFSET_RBR)
@@ -235,10 +235,10 @@ struct bfin_uart_regs {
#define UART_SET_DLAB(p) do { UART_PUT_LCR(p, UART_GET_LCR(p) | DLAB); SSYNC(); } while (0)
#ifndef put_lsr_cache
-# define put_lsr_cache(p, v) (((struct bfin_serial_port *)(p))->lsr = (v))
+# define put_lsr_cache(p, v)
#endif
#ifndef get_lsr_cache
-# define get_lsr_cache(p) (((struct bfin_serial_port *)(p))->lsr)
+# define get_lsr_cache(p) 0
#endif
/* The hardware clears the LSR bits upon read, so we need to cache