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authorMike Frysinger <michael.frysinger@analog.com>2007-07-12 22:58:21 +0800
committerBryan Wu <bryan.wu@analog.com>2007-07-12 22:58:21 +0800
commit1f83b8f148a1eb967d2a628cbb741cd56fb54572 (patch)
tree43b56238822ab35ec90a9ee9e9c014247950622f /arch/blackfin/kernel/setup.c
parent669b792c77bbc30e9f4d9c95dbc918dc348c49c2 (diff)
Blackfin arch: cleanup warnings from checkpatch -- no functional changes
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/kernel/setup.c')
-rw-r--r--arch/blackfin/kernel/setup.c44
1 files changed, 21 insertions, 23 deletions
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index a86bf6545781..3309238890ae 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -362,15 +362,15 @@ void __init setup_arch(char **cmdline_p)
, _stext, _etext,
__start_rodata, __end_rodata,
_sdata, _edata,
- (void*)&init_thread_union, (void*)((int)(&init_thread_union) + 0x2000),
+ (void *)&init_thread_union, (void *)((int)(&init_thread_union) + 0x2000),
__init_begin, __init_end,
__bss_start, __bss_stop,
- (void*)_ramstart, (void*)memory_end
+ (void *)_ramstart, (void *)memory_end
#ifdef CONFIG_MTD_UCLINUX
- , (void*)memory_mtd_start, (void*)(memory_mtd_start + mtd_size)
+ , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
#endif
#if DMA_UNCACHED_REGION > 0
- , (void*)(_ramend - DMA_UNCACHED_REGION), (void*)(_ramend)
+ , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
#endif
);
@@ -476,7 +476,6 @@ u_long get_cclk(void)
return get_vco() / ssel;
return get_vco() >> csel;
}
-
EXPORT_SYMBOL(get_cclk);
/* Get the System clock */
@@ -495,7 +494,6 @@ u_long get_sclk(void)
return get_vco() / ssel;
}
-
EXPORT_SYMBOL(get_sclk);
/*
@@ -550,23 +548,23 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_printf(m, "D-CACHE:\tOFF\n");
- switch(bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
- case ACACHE_BSRAM:
- seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n");
- dcache_size = 16;
- dsup_banks = 1;
- break;
- case ACACHE_BCACHE:
- seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n");
- dcache_size = 32;
- dsup_banks = 2;
- break;
- case ASRAM_BSRAM:
- seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n");
- dcache_size = 0;
- dsup_banks = 0;
- break;
- default:
+ switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
+ case ACACHE_BSRAM:
+ seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n");
+ dcache_size = 16;
+ dsup_banks = 1;
+ break;
+ case ACACHE_BCACHE:
+ seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n");
+ dcache_size = 32;
+ dsup_banks = 2;
+ break;
+ case ASRAM_BSRAM:
+ seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n");
+ dcache_size = 0;
+ dsup_banks = 0;
+ break;
+ default:
break;
}