diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-06-16 10:17:15 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-06-16 10:17:15 +0200 |
commit | 28638ea4f8adb63f837e4436560ab16ab0388587 (patch) | |
tree | 2dab7a03d7696697c82ba62a03700d3a2f3639b1 /arch/blackfin/lib/ins.S | |
parent | f781b03c4b1c713ac000877c8bbc31fc4164a29b (diff) | |
parent | 066519068ad2fbe98c7f45552b1f592903a9c8c8 (diff) |
Merge branch 'linus' into x86/nmitip-x86-nmi-2008-06-16_09.20_Mon
Conflicts:
arch/x86/kernel/nmi_32.c
Diffstat (limited to 'arch/blackfin/lib/ins.S')
-rw-r--r-- | arch/blackfin/lib/ins.S | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/arch/blackfin/lib/ins.S b/arch/blackfin/lib/ins.S index df7b8833a0c5..eba2343b1b59 100644 --- a/arch/blackfin/lib/ins.S +++ b/arch/blackfin/lib/ins.S @@ -7,7 +7,7 @@ * Description: Implementation of ins{bwl} for BlackFin processors using zero overhead loops. * * Modified: - * Copyright 2004-2006 Analog Devices Inc. + * Copyright 2004-2008 Analog Devices Inc. * Copyright (C) 2005 Bas Vermeulen, BuyWays BV <bas@buyways.nl> * * Bugs: Enter bugs at http://blackfin.uclinux.org/ @@ -63,6 +63,23 @@ ENTRY(_insw) RTS; ENDPROC(_insw) +ENTRY(_insw_8) + P0 = R0; /* P0 = port */ + cli R3; + P1 = R1; /* P1 = address */ + P2 = R2; /* P2 = count */ + SSYNC; + LSETUP( .Lword8_loop_s, .Lword8_loop_e) LC0 = P2; +.Lword8_loop_s: R0 = W[P0]; + B[P1++] = R0; + R0 = R0 >> 8; + B[P1++] = R0; + NOP; +.Lword8_loop_e: NOP; + sti R3; + RTS; +ENDPROC(_insw_8) + ENTRY(_insb) P0 = R0; /* P0 = port */ cli R3; @@ -78,8 +95,6 @@ ENTRY(_insb) RTS; ENDPROC(_insb) - - ENTRY(_insl_16) P0 = R0; /* P0 = port */ cli R3; |