diff options
| author | Mike Frysinger <vapier@gentoo.org> | 2010-07-29 02:04:42 +0000 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2010-08-06 12:55:55 -0400 |
| commit | 2b73a19f2d3391b070d9d9270a9c9d502fe357ce (patch) | |
| tree | 848160deecb40270d08cf11a5739dedca043d7cd /arch/blackfin/mach-bf548/include | |
| parent | ba3f5973ce3eb7ef4894ccd3df78c5cb410b17cc (diff) | |
Blackfin: BF54x: tweak DMAC MMR naming to match other ports
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf548/include')
| -rw-r--r-- | arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h | 16 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf548/include/mach/defBF54x_base.h | 8 |
2 files changed, 12 insertions, 12 deletions
diff --git a/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h index 32f71e6a7c15..ea3ec4ea9e2b 100644 --- a/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h +++ b/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h @@ -301,10 +301,10 @@ /* DMAC0 Registers */ -#define bfin_read_DMAC0_TCPER() bfin_read16(DMAC0_TCPER) -#define bfin_write_DMAC0_TCPER(val) bfin_write16(DMAC0_TCPER, val) -#define bfin_read_DMAC0_TCCNT() bfin_read16(DMAC0_TCCNT) -#define bfin_write_DMAC0_TCCNT(val) bfin_write16(DMAC0_TCCNT, val) +#define bfin_read_DMAC0_TC_PER() bfin_read16(DMAC0_TC_PER) +#define bfin_write_DMAC0_TC_PER(val) bfin_write16(DMAC0_TC_PER, val) +#define bfin_read_DMAC0_TC_CNT() bfin_read16(DMAC0_TC_CNT) +#define bfin_write_DMAC0_TC_CNT(val) bfin_write16(DMAC0_TC_CNT, val) /* DMA Channel 0 Registers */ @@ -1155,10 +1155,10 @@ /* DMAC1 Registers */ -#define bfin_read_DMAC1_TCPER() bfin_read16(DMAC1_TCPER) -#define bfin_write_DMAC1_TCPER(val) bfin_write16(DMAC1_TCPER, val) -#define bfin_read_DMAC1_TCCNT() bfin_read16(DMAC1_TCCNT) -#define bfin_write_DMAC1_TCCNT(val) bfin_write16(DMAC1_TCCNT, val) +#define bfin_read_DMAC1_TC_PER() bfin_read16(DMAC1_TC_PER) +#define bfin_write_DMAC1_TC_PER(val) bfin_write16(DMAC1_TC_PER, val) +#define bfin_read_DMAC1_TC_CNT() bfin_read16(DMAC1_TC_CNT) +#define bfin_write_DMAC1_TC_CNT(val) bfin_write16(DMAC1_TC_CNT, val) /* DMA Channel 12 Registers */ diff --git a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h index 01d52fade45e..4b33b18de0bb 100644 --- a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h +++ b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h @@ -198,8 +198,8 @@ /* DMAC0 Registers */ -#define DMAC0_TCPER 0xffc00b0c /* DMA Controller 0 Traffic Control Periods Register */ -#define DMAC0_TCCNT 0xffc00b10 /* DMA Controller 0 Current Counts Register */ +#define DMAC0_TC_PER 0xffc00b0c /* DMA Controller 0 Traffic Control Periods Register */ +#define DMAC0_TC_CNT 0xffc00b10 /* DMA Controller 0 Current Counts Register */ /* DMA Channel 0 Registers */ @@ -688,8 +688,8 @@ /* DMAC1 Registers */ -#define DMAC1_TCPER 0xffc01b0c /* DMA Controller 1 Traffic Control Periods Register */ -#define DMAC1_TCCNT 0xffc01b10 /* DMA Controller 1 Current Counts Register */ +#define DMAC1_TC_PER 0xffc01b0c /* DMA Controller 1 Traffic Control Periods Register */ +#define DMAC1_TC_CNT 0xffc01b10 /* DMA Controller 1 Current Counts Register */ /* DMA Channel 12 Registers */ |