diff options
| author | Bob Liu <lliubbo@gmail.com> | 2012-07-11 15:28:11 +0800 |
|---|---|---|
| committer | Bob Liu <lliubbo@gmail.com> | 2012-07-24 13:39:53 +0800 |
| commit | acb3166dab2bc6755408a015d69e4b47626741df (patch) | |
| tree | b2b61e69f4b2eaa14b7a72bbe7f83b482002f763 /arch/blackfin | |
| parent | 06051fdefddf25e0bbf983aac40680f835829db7 (diff) | |
blackfin: cplb-nompu: fix ROM cplb size for bf609-ezkit
In user xip test, there is a cplb error when ROMKERNEL try to mount romfs
using 'mount -t romfs /dev/mtdblock2 /mnt', becasue the CPLB setting is not
correct.
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Diffstat (limited to 'arch/blackfin')
| -rw-r--r-- | arch/blackfin/kernel/cplb-nompu/cplbinit.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c index 3e366dc2d6e1..34e96ce02aa9 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c @@ -58,12 +58,20 @@ void __init generate_cplb_tables_cpu(unsigned int cpu) #ifdef CONFIG_ROMKERNEL /* Cover kernel XIP flash area */ +#ifdef CONFIG_BF60x + addr = CONFIG_ROM_BASE & ~(16 * 1024 * 1024 - 1); + d_tbl[i_d].addr = addr; + d_tbl[i_d++].data = SDRAM_DGENERIC | PAGE_SIZE_16MB; + i_tbl[i_i].addr = addr; + i_tbl[i_i++].data = SDRAM_IGENERIC | PAGE_SIZE_16MB; +#else addr = CONFIG_ROM_BASE & ~(4 * 1024 * 1024 - 1); d_tbl[i_d].addr = addr; d_tbl[i_d++].data = SDRAM_DGENERIC | PAGE_SIZE_4MB; i_tbl[i_i].addr = addr; i_tbl[i_i++].data = SDRAM_IGENERIC | PAGE_SIZE_4MB; #endif +#endif /* Cover L1 memory. One 4M area for code and data each is enough. */ if (cpu == 0) { |