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| author | Jiri Kosina <jkosina@suse.cz> | 2010-06-16 18:08:13 +0200 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2010-06-16 18:08:13 +0200 |
| commit | f1bbbb6912662b9f6070c5bfc4ca9eb1f06a9d5b (patch) | |
| tree | c2c130a74be25b0b2dff992e1a195e2728bdaadd /arch/frv/include/asm/mem-layout.h | |
| parent | fd0961ff67727482bb20ca7e8ea97b83e9de2ddb (diff) | |
| parent | 7e27d6e778cd87b6f2415515d7127eba53fe5d02 (diff) | |
Merge branch 'master' into for-next
Diffstat (limited to 'arch/frv/include/asm/mem-layout.h')
| -rw-r--r-- | arch/frv/include/asm/mem-layout.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/frv/include/asm/mem-layout.h b/arch/frv/include/asm/mem-layout.h index 2947764fc0e0..ccae981876fa 100644 --- a/arch/frv/include/asm/mem-layout.h +++ b/arch/frv/include/asm/mem-layout.h @@ -35,8 +35,8 @@ * the slab must be aligned such that load- and store-double instructions don't * fault if used */ -#define ARCH_KMALLOC_MINALIGN 8 -#define ARCH_SLAB_MINALIGN 8 +#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES +#define ARCH_SLAB_MINALIGN L1_CACHE_BYTES /*****************************************************************************/ /* |