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authorRobin Holt <holt@sgi.com>2005-11-11 09:35:43 -0600
committerTony Luck <tony.luck@intel.com>2005-11-11 09:37:29 -0800
commit837cd0bdf54dd954cd6aa43d250f75ab5db79617 (patch)
treeef28b91f1ac8c1c9f4244da9be1f994306ef4070 /arch/ia64/kernel/cyclone.c
parentd12eb7e11cf30c30f639b2093735af2ac177830b (diff)
[IA64] 4-level page tables
This patch introduces 4-level page tables to ia64. I have run some benchmarks and found nothing interesting. Performance has consistently fallen within the noise range. It also introduces a config option (setting the default to 3 levels). The config option prevents having 4 level page tables with 64k base page size. Signed-off-by: Robin Holt <holt@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/kernel/cyclone.c')
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