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authorTony Luck <tony.luck@intel.com>2007-04-30 13:56:00 -0700
committerTony Luck <tony.luck@intel.com>2007-04-30 13:56:00 -0700
commitb643b0fdbc59cf6bbb086974b29d2571e9e9f646 (patch)
tree59d1a1298ffc98877183a8def5c180c0f74e568b /arch/ia64/mm
parente0cc09e295f346b7921e921f385fe5213472316a (diff)
parent00b65985fb2fc542b855b03fcda0d0f2bab4f442 (diff)
Pull percpu-dtc into release branch
Diffstat (limited to 'arch/ia64/mm')
-rw-r--r--arch/ia64/mm/init.c11
1 files changed, 1 insertions, 10 deletions
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index 4f36987eea72..5b70241741b4 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -355,7 +355,7 @@ setup_gate (void)
void __devinit
ia64_mmu_init (void *my_cpu_data)
{
- unsigned long psr, pta, impl_va_bits;
+ unsigned long pta, impl_va_bits;
extern void __devinit tlb_init (void);
#ifdef CONFIG_DISABLE_VHPT
@@ -364,15 +364,6 @@ ia64_mmu_init (void *my_cpu_data)
# define VHPT_ENABLE_BIT 1
#endif
- /* Pin mapping for percpu area into TLB */
- psr = ia64_clear_ic();
- ia64_itr(0x2, IA64_TR_PERCPU_DATA, PERCPU_ADDR,
- pte_val(pfn_pte(__pa(my_cpu_data) >> PAGE_SHIFT, PAGE_KERNEL)),
- PERCPU_PAGE_SHIFT);
-
- ia64_set_psr(psr);
- ia64_srlz_i();
-
/*
* Check if the virtually mapped linear page table (VMLPT) overlaps with a mapped
* address space. The IA-64 architecture guarantees that at least 50 bits of