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authorKen Chen <kenneth.w.chen@intel.com>2005-06-21 14:40:31 -0700
committerTony Luck <tony.luck@intel.com>2005-06-21 14:40:31 -0700
commit0393eed5c3220c9c3823a09a2d02329b8ff08b45 (patch)
treec465ee4c3a0322a4e6533f4e1ec0968b8b254907 /arch/ia64/pci
parent52a0de2cd2d3da8f90d88e2eccb63d0cadd6ae26 (diff)
[IA64] fix nested_dtlb_miss handler for hugetlb address
The nested_dtlb_miss handler currently does not handle fault from hugetlb address correctly. It walks the page table assuming PAGE_SIZE. Thus when taking a fault triggered from hugetlb address, it would not calculate the pgd/pmd/pte address correctly and thus result an incorrect invocation of ia64_do_page_fault(). In there, kernel will signal SIGBUS and application dies (The faulting address is perfectly legal and we have a valid pte for the corresponding user hugetlb address as well). This patch fix the described kernel bug. Since nested_dtlb_miss is a rare event and a slow path anyway, I'm making the change without #ifdef CONFIG_HUGETLB_PAGE for code readability. Tony, please apply. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/pci')
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