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authorLinus Torvalds <torvalds@linux-foundation.org>2012-03-21 18:17:51 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-03-21 18:17:51 -0700
commitb57cb7231b2ce52d3dda14a7b417ae125fb2eb97 (patch)
treeb6b3af0b2866f76fe5db80af678f4b3d54cc9b81 /arch/m68k/include/asm/m532xsim.h
parentad12ab259d9131a53aa11c7c4561d97f7cc900df (diff)
parentae909ea4ad2431e085e6cc96446fbc1c1ae88498 (diff)
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
Pull m68knommu arch updates from Greg Ungerer: "Includes a cleanup of the non-MMU linker script (it now almost exclusively uses the well defined linker script support macros and definitions). Some more merging of MMU and non-MMU common files (specifically the arch process.c, ptrace and time.c). And a big cleanup of the massively duplicated ColdFire device definition code. Overall we remove about 2000 lines of code, and end up with a single set of platform device definitions for the serial ports, ethernet ports and QSPI ports common in most ColdFire SoCs. I expect you will get a merge conflict on arch/m68k/kernel/process.c, in cpu_idle(). It should be relatively strait forward to fixup." And cpu_idle() conflict resolution was indeed trivial (merging the nommu/mmu versions of process.c trivially conflicting with the conversion to use the schedule_preempt_disabled() helper function) * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (57 commits) m68knommu: factor more common ColdFire cpu reset code m68knommu: make 528x CPU reset register addressing consistent m68knommu: make 527x CPU reset register addressing consistent m68knommu: make 523x CPU reset register addressing consistent m68knommu: factor some common ColdFire cpu reset code m68knommu: move old ColdFire timers init from CPU init to timers code m68knommu: clean up init code in ColdFire 532x startup m68knommu: clean up init code in ColdFire 528x startup m68knommu: clean up init code in ColdFire 523x startup m68knommu: merge common ColdFire QSPI platform setup code m68knommu: make 532x QSPI platform addressing consistent m68knommu: make 528x QSPI platform addressing consistent m68knommu: make 527x QSPI platform addressing consistent m68knommu: make 5249 QSPI platform addressing consistent m68knommu: make 523x QSPI platform addressing consistent m68knommu: make 520x QSPI platform addressing consistent m68knommu: merge common ColdFire FEC platform setup code m68knommu: make 532x FEC platform addressing consistent m68knommu: make 528x FEC platform addressing consistent m68knommu: make 527x FEC platform addressing consistent ...
Diffstat (limited to 'arch/m68k/include/asm/m532xsim.h')
-rw-r--r--arch/m68k/include/asm/m532xsim.h35
1 files changed, 32 insertions, 3 deletions
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h
index ba4cc784f574..29b66e21413a 100644
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m532xsim.h
@@ -24,6 +24,19 @@
#define MCFINT_UART1 27 /* Interrupt number for UART1 */
#define MCFINT_UART2 28 /* Interrupt number for UART2 */
#define MCFINT_QSPI 31 /* Interrupt number for QSPI */
+#define MCFINT_FECRX0 36 /* Interrupt number for FEC */
+#define MCFINT_FECTX0 40 /* Interrupt number for FEC */
+#define MCFINT_FECENTC0 42 /* Interrupt number for FEC */
+
+#define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0)
+#define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1)
+#define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2)
+
+#define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0)
+#define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0)
+#define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0)
+
+#define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI)
#define MCF_WTM_WCR MCF_REG16(0xFC098000)
@@ -82,9 +95,25 @@
/*
* UART module.
*/
-#define MCFUART_BASE1 0xFC060000 /* Base address of UART1 */
-#define MCFUART_BASE2 0xFC064000 /* Base address of UART2 */
-#define MCFUART_BASE3 0xFC068000 /* Base address of UART3 */
+#define MCFUART_BASE0 0xFC060000 /* Base address of UART1 */
+#define MCFUART_BASE1 0xFC064000 /* Base address of UART2 */
+#define MCFUART_BASE2 0xFC068000 /* Base address of UART3 */
+
+/*
+ * FEC module.
+ */
+#define MCFFEC_BASE0 0xFC030000 /* Base address of FEC0 */
+#define MCFFEC_SIZE0 0x800 /* Size of FEC0 region */
+
+/*
+ * QSPI module.
+ */
+#define MCFQSPI_BASE 0xFC058000 /* Base address of QSPI */
+#define MCFQSPI_SIZE 0x40 /* Size of QSPI region */
+
+#define MCFQSPI_CS0 84
+#define MCFQSPI_CS1 85
+#define MCFQSPI_CS2 86
/*
* Timer module.