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| author | Catalin Marinas <catalin.marinas@arm.com> | 2012-11-05 14:58:32 +0000 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2012-11-05 14:58:32 +0000 |
| commit | 3fd9396af83a1e69eaf9ebb573207431d8f265b6 (patch) | |
| tree | f221f5777695de71ea97423c67438bca1746e26c /arch/m68k/include/uapi/asm/cachectl.h | |
| parent | e3978cded41dc7b364e74037f56d6bc558c11fd7 (diff) | |
| parent | 3d70f8c617a436c7146ecb81df2265b4626dfe89 (diff) | |
Merge tag 'v3.7-rc4' into upstream-master
Linux 3.7-rc4
Diffstat (limited to 'arch/m68k/include/uapi/asm/cachectl.h')
| -rw-r--r-- | arch/m68k/include/uapi/asm/cachectl.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/m68k/include/uapi/asm/cachectl.h b/arch/m68k/include/uapi/asm/cachectl.h new file mode 100644 index 000000000000..525978e959e3 --- /dev/null +++ b/arch/m68k/include/uapi/asm/cachectl.h @@ -0,0 +1,14 @@ +#ifndef _M68K_CACHECTL_H +#define _M68K_CACHECTL_H + +/* Definitions for the cacheflush system call. */ + +#define FLUSH_SCOPE_LINE 1 /* Flush a cache line */ +#define FLUSH_SCOPE_PAGE 2 /* Flush a page */ +#define FLUSH_SCOPE_ALL 3 /* Flush the whole cache -- superuser only */ + +#define FLUSH_CACHE_DATA 1 /* Writeback and flush data cache */ +#define FLUSH_CACHE_INSN 2 /* Flush instruction cache */ +#define FLUSH_CACHE_BOTH 3 /* Flush both caches */ + +#endif /* _M68K_CACHECTL_H */ |