diff options
| author | Greg Ungerer <gerg@uclinux.org> | 2011-12-24 00:21:18 +1000 |
|---|---|---|
| committer | Greg Ungerer <gerg@uclinux.org> | 2012-03-05 09:43:05 +1000 |
| commit | ffc203bc19eda0e58fea1bdf8172f313f26f8722 (patch) | |
| tree | d3e808bcbeba56062a70fe454856945ca5052fcf /arch/m68k/include | |
| parent | 8400ca322e2fb6771d2adfc05a745b8872af038d (diff) | |
m68knommu: make 520x UART platform addressing consistent
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 520x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include')
| -rw-r--r-- | arch/m68k/include/asm/m520xsim.h | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index eda62de7e607..41ed4dc8d736 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h @@ -50,6 +50,10 @@ #define MCFINT_QSPI 31 /* Interrupt number for QSPI */ #define MCFINT_PIT1 4 /* Interrupt number for PIT1 (PIT0 in processor) */ +#define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0) +#define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1) +#define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2) + /* * SDRAM configuration registers. */ @@ -144,9 +148,9 @@ /* * UART module. */ -#define MCFUART_BASE1 0xFC060000 /* Base address of UART1 */ -#define MCFUART_BASE2 0xFC064000 /* Base address of UART2 */ -#define MCFUART_BASE3 0xFC068000 /* Base address of UART2 */ +#define MCFUART_BASE0 0xFC060000 /* Base address of UART0 */ +#define MCFUART_BASE1 0xFC064000 /* Base address of UART1 */ +#define MCFUART_BASE2 0xFC068000 /* Base address of UART2 */ /* * FEC module. |