diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2012-03-04 21:09:11 +0000 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-03-04 21:20:46 +0000 |
| commit | 709baa67c676a187a63c0f0f40efceb3fb1eef72 (patch) | |
| tree | 0a2b8bab5ac4f52069a1e50d20028ae44d8c256a /arch/m68k/mm/mcfmmu.c | |
| parent | 281a9f78eaa5d0d78bd0e3acd181a24d3bad28e3 (diff) | |
| parent | 8c690fdf465be9d97229f6bb0e6346624d6753a9 (diff) | |
Merge tag 'tegra-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra into tegra/soc2
From: Olof Johansson <olof@lixom.net>
Tegra 30 SMP support
I did this as a separate topic branch because it depends on both the
soc and the soc-drivers branch, so it brings both of those in as a base.
This branch contains work to enable SMP support on Tegra30 and reworks
some of the SMP bringup for T20 as well.
It also contains a device tree patch that builds on top of the SMP/clock
changes in the rest of the branch, so it made more sense to apply it
here than deal with the merge conflicts back and forth.
* tag 'tegra-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra:
ARM: dt: Explicitly configure all serial ports on Tegra Cardhu
ARM: tegra: support for secondary cores on Tegra30
ARM: tegra: support for Tegra30 CPU powerdomains
ARM: tegra: add support for Tegra30 powerdomains
ARM: tegra: export tegra_powergate_is_powered()
ARM: tegra: prepare powergate.c for multiple variants
ARM: tegra: rework Tegra secondary CPU core bringup
ARM: tegra: functions to access the flowcontroller
ARM: tegra: initialize Tegra chipid early
ARM: tegra: export Tegra chipid
ARM: tegra: cleanup use of chipid register
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/m68k/mm/mcfmmu.c')
| -rw-r--r-- | arch/m68k/mm/mcfmmu.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/m68k/mm/mcfmmu.c b/arch/m68k/mm/mcfmmu.c index babd5a97cdcb..875b800ef0dd 100644 --- a/arch/m68k/mm/mcfmmu.c +++ b/arch/m68k/mm/mcfmmu.c @@ -87,7 +87,7 @@ void __init paging_init(void) int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word) { - unsigned long flags, mmuar; + unsigned long flags, mmuar, mmutr; struct mm_struct *mm; pgd_t *pgd; pmd_t *pmd; @@ -137,9 +137,10 @@ int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word) if (!pte_dirty(*pte) && !KMAPAREA(mmuar)) set_pte(pte, pte_wrprotect(*pte)); - mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) | - (((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK) - >> CF_PAGE_MMUTR_SHIFT) | MMUTR_V); + mmutr = (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) | MMUTR_V; + if ((mmuar < TASK_UNMAPPED_BASE) || (mmuar >= TASK_SIZE)) + mmutr |= (pte->pte & CF_PAGE_MMUTR_MASK) >> CF_PAGE_MMUTR_SHIFT; + mmu_write(MMUTR, mmutr); mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) | ((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X); |