diff options
author | Steven King <sfking@fdwdc.com> | 2014-05-21 16:00:33 -0700 |
---|---|---|
committer | Greg Ungerer <gerg@uclinux.org> | 2014-05-26 13:28:38 +1000 |
commit | 83c6bdb827c9422fe6e02130d9546800143304c1 (patch) | |
tree | ddd7d58034bc1f14d11e6dc4233301c37feab34b /arch/m68k | |
parent | ec9f8483547fa354a5747d8954cd0b91225a0b2d (diff) |
m68knommu: Implement gpio support for m54xx.
Singed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k')
-rw-r--r-- | arch/m68k/include/asm/m54xxsim.h | 12 | ||||
-rw-r--r-- | arch/m68k/include/asm/mcfgpio.h | 12 |
2 files changed, 17 insertions, 7 deletions
diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h index d3bd83887429..a5fbd17ab0a5 100644 --- a/arch/m68k/include/asm/m54xxsim.h +++ b/arch/m68k/include/asm/m54xxsim.h @@ -55,9 +55,15 @@ /* * Generic GPIO support */ -#define MCFGPIO_PIN_MAX 0 /* I am too lazy to count */ -#define MCFGPIO_IRQ_MAX -1 -#define MCFGPIO_IRQ_VECBASE -1 +#define MCFGPIO_PODR (MCF_MBAR + 0xA00) +#define MCFGPIO_PDDR (MCF_MBAR + 0xA10) +#define MCFGPIO_PPDR (MCF_MBAR + 0xA20) +#define MCFGPIO_SETR (MCF_MBAR + 0xA20) +#define MCFGPIO_CLRR (MCF_MBAR + 0xA30) + +#define MCFGPIO_PIN_MAX 136 /* 128 gpio + 8 eport */ +#define MCFGPIO_IRQ_MAX 8 +#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE /* * EDGE Port support. diff --git a/arch/m68k/include/asm/mcfgpio.h b/arch/m68k/include/asm/mcfgpio.h index c41ebf45f1d0..66203c334c6f 100644 --- a/arch/m68k/include/asm/mcfgpio.h +++ b/arch/m68k/include/asm/mcfgpio.h @@ -139,7 +139,8 @@ static inline void gpio_free(unsigned gpio) #if defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ - defined(CONFIG_M53xx) || defined(CONFIG_M5441x) + defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ + defined(CONFIG_M5441x) /* * These parts have an 'Edge' Port module (external interrupt/GPIO) which uses * read-modify-write to change an output and a GPIO module which has separate @@ -195,7 +196,8 @@ static inline u32 __mcfgpio_ppdr(unsigned gpio) return MCFSIM2_GPIO1READ; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ - defined(CONFIG_M53xx) || defined(CONFIG_M5441x) + defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ + defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPPDR; @@ -237,7 +239,8 @@ static inline u32 __mcfgpio_podr(unsigned gpio) return MCFSIM2_GPIO1WRITE; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ - defined(CONFIG_M53xx) || defined(CONFIG_M5441x) + defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ + defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPDR; @@ -279,7 +282,8 @@ static inline u32 __mcfgpio_pddr(unsigned gpio) return MCFSIM2_GPIO1ENABLE; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ - defined(CONFIG_M53xx) || defined(CONFIG_M5441x) + defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ + defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPDDR; |