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author | Krzysztof Kozlowski <krzk@kernel.org> | 2020-12-10 22:29:02 +0100 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-03-04 10:26:12 +0100 |
commit | 9ab4364ecd9908eda133e0df6a74c4083db59351 (patch) | |
tree | f64e887981d0e293a056e3737e10c0f4b45e57ca /arch/mips/alchemy | |
parent | 0fb966b5d10bbead16c617701889fa80c268a611 (diff) |
arm64: dts: exynos: correct PMIC interrupt trigger level on Espresso
[ Upstream commit 1fea2eb2f5bbd3fbbe2513d2386b5f6e6db17fd7 ]
The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU. Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.
Fixes: 9589f7721e16 ("arm64: dts: Add S2MPS15 PMIC node on exynos7-espresso")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212903.216728-8-krzk@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/mips/alchemy')
0 files changed, 0 insertions, 0 deletions