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authorChandrakala Chavva <cchavva@caviumnetworks.com>2015-03-05 18:06:11 +0300
committerRalf Baechle <ralf@linux-mips.org>2015-04-01 17:21:44 +0200
commitfe2360f8f505ea8340f710f1c80a8f56462bdd62 (patch)
tree139dad3e759f6e14a7716121cd392f44a1aa7ab5 /arch/mips/cavium-octeon
parent254f0bd99d37341b96977b9fdb153874e20db449 (diff)
MIPS: OCTEON: Use correct CSR to soft reset
This fixes reboot for Octeon III boards [ralf@linux-mips.org: Dropped segment for function cvmx_reset_octeon() which was removed by the preceeding commit.] Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9464/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon')
-rw-r--r--arch/mips/cavium-octeon/setup.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 01130e93126d..73348afa4b80 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -416,7 +416,10 @@ static void octeon_restart(char *command)
mb();
while (1)
- cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
+ if (OCTEON_IS_OCTEON3())
+ cvmx_write_csr(CVMX_RST_SOFT_RST, 1);
+ else
+ cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
}