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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-11 19:21:23 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-11 19:21:23 -0700
commitdd6d1844af33acb4edd0a40b1770d091a22c94be (patch)
treee6bd3549919773a13b770324a4dddb51b194b452 /arch/mips/cobalt/setup.c
parent19f71153b9be219756c6b2757921433a69b7975c (diff)
parentaaf76a3245c02faba51c96b9a340c14d6bb0dcc0 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (80 commits) [MIPS] tlbex.c: Cleanup __init usage. [MIPS] WRPPMC serial support move to platform device [MIPS] R1: Fix hazard barriers to make kernels work on R2 also. [MIPS] VPE: reimplement ELF loader. [MIPS] cleanup WRPPMC include files [MIPS] Add BUG_ON assertion for attempt to run kernel on the wrong CPU type. [MIPS] SMP: Use ISO C struct initializer for local structs. [MIPS] SMP: Kill useless casts. [MIPS] Kill num_online_cpus() loops. [MIPS] SMP: Implement smp_call_function_mask(). [MIPS] Make facility to convert CPU types to strings generally available. [MIPS] Convert list of CPU types from #define to enum. [MIPS] Optimize get_unaligned / put_unaligned implementations. [MIPS] checkfiles: Fix "need space after that ','" errors. [MIPS] Fix "no space between function name and open parenthesis" warnings. [MIPS] Allow hardwiring of the CPU type to a single type for optimization. [MIPS] tlbex: Size optimize code by declaring a few functions inline. [MIPS] pg-r4k.c: Dump the generated code [MIPS] Cobalt: Remove cobalt_machine_power_off() [MIPS] Cobalt: Move reset port definition to arch/mips/cobalt/reset.c ...
Diffstat (limited to 'arch/mips/cobalt/setup.c')
-rw-r--r--arch/mips/cobalt/setup.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index 7abe45e78425..d11bb1bc7b6b 100644
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -15,15 +15,16 @@
#include <asm/bootinfo.h>
#include <asm/time.h>
+#include <asm/i8253.h>
#include <asm/io.h>
#include <asm/reboot.h>
#include <asm/gt64120.h>
#include <cobalt.h>
+#include <irq.h>
extern void cobalt_machine_restart(char *command);
extern void cobalt_machine_halt(void);
-extern void cobalt_machine_power_off(void);
const char *get_system_type(void)
{
@@ -45,14 +46,10 @@ void __init plat_timer_setup(struct irqaction *irq)
/* Load timer value for HZ (TCLK is 50MHz) */
GT_WRITE(GT_TC0_OFS, 50*1000*1000 / HZ);
- /* Enable timer */
+ /* Enable timer0 */
GT_WRITE(GT_TC_CONTROL_OFS, GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK);
- /* Register interrupt */
- setup_irq(COBALT_GALILEO_IRQ, irq);
-
- /* Enable interrupt */
- GT_WRITE(GT_INTRMASK_OFS, GT_INTR_T0EXP_MSK | GT_READ(GT_INTRMASK_OFS));
+ setup_irq(GT641XX_TIMER0_IRQ, irq);
}
/*
@@ -87,13 +84,18 @@ static struct resource cobalt_reserved_resources[] = {
},
};
+void __init plat_time_init(void)
+{
+ setup_pit_timer();
+}
+
void __init plat_mem_setup(void)
{
int i;
_machine_restart = cobalt_machine_restart;
_machine_halt = cobalt_machine_halt;
- pm_power_off = cobalt_machine_power_off;
+ pm_power_off = cobalt_machine_halt;
set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));
@@ -117,8 +119,6 @@ void __init prom_init(void)
unsigned long memsz;
char **argv;
- mips_machgroup = MACH_GROUP_COBALT;
-
memsz = fw_arg0 & 0x7fff0000;
narg = fw_arg0 & 0x0000ffff;