diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2015-04-13 16:03:32 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-04-13 16:03:32 +0200 |
| commit | 3e20a26b02bd4f24945c87407df51948dd488620 (patch) | |
| tree | f466d3b2a47a98ec2910724e17ee2f3a93c1a49e /arch/mips/include/asm/cpu.h | |
| parent | 98b0429b7abd5c05efdb23f3eba02ec3f696748e (diff) | |
| parent | 5306a5450824691e27d68f711758515debedeeac (diff) | |
Merge branch '4.0-fixes' into mips-for-linux-next
Diffstat (limited to 'arch/mips/include/asm/cpu.h')
| -rw-r--r-- | arch/mips/include/asm/cpu.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index fd2e893e9d9f..e3adca1d0b99 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -377,7 +377,8 @@ enum cpu_type_enum { #define MIPS_CPU_MAAR 0x400000000ull /* MAAR(I) registers are present */ #define MIPS_CPU_FRE 0x800000000ull /* FRE & UFE bits implemented */ #define MIPS_CPU_RW_LLB 0x1000000000ull /* LLADDR/LLB writes are allowed */ -#define MIPS_CPU_CDMM 0x2000000000ull /* CPU has Common Device Memory Map */ +#define MIPS_CPU_XPA 0x2000000000ull /* CPU supports Extended Physical Addressing */ +#define MIPS_CPU_CDMM 0x4000000000ull /* CPU has Common Device Memory Map */ /* * CPU ASE encodings |