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| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-18 17:12:14 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-18 17:12:14 +0100 |
| commit | fac56c2df51bc29b07b3c2dcfabf32a015a0522c (patch) | |
| tree | 1ff5d84ecf4ea0bcbd42e2ef9624b5ade3810890 /arch/mips/include/asm/io.h | |
| parent | 6caa15d0b84d2ea688fd31f4f172c8353463e109 (diff) | |
| parent | a6360dd37e1a144ed11e6548371bade559a1e4df (diff) | |
Merge commit 'v2.6.39-rc3' into for-2.6.39
Diffstat (limited to 'arch/mips/include/asm/io.h')
| -rw-r--r-- | arch/mips/include/asm/io.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 5b017f23e243..b04e4de5dd2e 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -242,7 +242,7 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, * This version of ioremap ensures that the memory is marked uncachable * on the CPU as well as honouring existing caching rules from things like * the PCI bus. Note that there are other caches and buffers on many - * busses. In paticular driver authors should read up on PCI writes + * busses. In particular driver authors should read up on PCI writes * * It's useful if some control registers are in such an area and * write combining or read caching is not desirable: |