diff options
author | Andrew Bresticker <abrestic@chromium.org> | 2014-10-20 12:03:53 -0700 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 07:44:59 +0100 |
commit | 4060bbe9931eca2ed3c2124022a070a75d507472 (patch) | |
tree | d3e579a5eb683dabd44ab0a057c0d1d58f5751ce /arch/mips/include/asm/mips-boards | |
parent | 5f68fea09ef1bc36e16d1059a84cf8b833cfb789 (diff) |
MIPS: Move gic.h to include/linux/irqchip/mips-gic.h
Now that the MIPS GIC irqchip lives in drivers/irqchip/, move
its header over to include/linux/irqchip/.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8129/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mips-boards')
-rw-r--r-- | arch/mips/include/asm/mips-boards/maltaint.h | 2 | ||||
-rw-r--r-- | arch/mips/include/asm/mips-boards/sead3int.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mips-boards/maltaint.h b/arch/mips/include/asm/mips-boards/maltaint.h index 38b06a027437..987ff580466b 100644 --- a/arch/mips/include/asm/mips-boards/maltaint.h +++ b/arch/mips/include/asm/mips-boards/maltaint.h @@ -10,7 +10,7 @@ #ifndef _MIPS_MALTAINT_H #define _MIPS_MALTAINT_H -#include <asm/gic.h> +#include <linux/irqchip/mips-gic.h> /* * Interrupts 0..15 are used for Malta ISA compatible interrupts diff --git a/arch/mips/include/asm/mips-boards/sead3int.h b/arch/mips/include/asm/mips-boards/sead3int.h index 59d6c32c7595..8932c7de0419 100644 --- a/arch/mips/include/asm/mips-boards/sead3int.h +++ b/arch/mips/include/asm/mips-boards/sead3int.h @@ -10,7 +10,7 @@ #ifndef _MIPS_SEAD3INT_H #define _MIPS_SEAD3INT_H -#include <asm/gic.h> +#include <linux/irqchip/mips-gic.h> /* SEAD-3 GIC address space definitions. */ #define GIC_BASE_ADDR 0x1b1c0000 |