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authorJayachandran C <jchandra@broadcom.com>2013-06-10 06:30:00 +0000
committerRalf Baechle <ralf@linux-mips.org>2013-06-13 17:46:41 +0200
commit2c952e06e4f57716109b609956eda28c900faac0 (patch)
tree39dc9361773009cdcfdc1e0e1752b446259d7cef /arch/mips/include/asm/processor.h
parent79f8511c83f13689913f54d2f189297c226ec064 (diff)
MIPS: Move cop2 save/restore to switch_to()
Move the common code for saving and restoring platform specific COP2 registers to switch_to(). This will make supporting new platforms (like Netlogic XLP) easier. The platform specific COP2 definitions are to be specified in asm/processor.h and in asm/cop2.h. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/5411/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/processor.h')
-rw-r--r--arch/mips/include/asm/processor.h18
1 files changed, 7 insertions, 11 deletions
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index 1470b7b68b0e..7c637a461ced 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -137,7 +137,7 @@ union mips_watch_reg_state {
struct mips3264_watch_reg_state mips3264;
};
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
+#if defined(CONFIG_CPU_CAVIUM_OCTEON)
struct octeon_cop2_state {
/* DMFC2 rt, 0x0201 */
@@ -182,13 +182,16 @@ struct octeon_cop2_state {
/* DMFC2 rt, 0x025A; DMFC2 rt, 0x025B - Pass2 */
unsigned long cop2_gfm_result[2];
};
-#define INIT_OCTEON_COP2 {0,}
+#define COP2_INIT \
+ .cp2 = {0,},
struct octeon_cvmseg_state {
unsigned long cvmseg[CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE]
[cpu_dcache_line_size() / sizeof(unsigned long)];
};
+#else
+#define COP2_INIT
#endif
typedef struct {
@@ -245,13 +248,6 @@ struct thread_struct {
#define FPAFF_INIT
#endif /* CONFIG_MIPS_MT_FPAFF */
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
-#define OCTEON_INIT \
- .cp2 = INIT_OCTEON_COP2,
-#else
-#define OCTEON_INIT
-#endif /* CONFIG_CPU_CAVIUM_OCTEON */
-
#define INIT_THREAD { \
/* \
* Saved main processor registers \
@@ -300,9 +296,9 @@ struct thread_struct {
.cp0_baduaddr = 0, \
.error_code = 0, \
/* \
- * Cavium Octeon specifics (null if not Octeon) \
+ * Platform specific cop2 registers(null if no COP2) \
*/ \
- OCTEON_INIT \
+ COP2_INIT \
}
struct task_struct;