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authorDavid Howells <dhowells@redhat.com>2012-10-09 09:47:14 +0100
committerDavid Howells <dhowells@redhat.com>2012-10-09 09:47:14 +0100
commit61730c538f8281efa7ac12596da9f3f9a31b9272 (patch)
treecda3febfc512cd4dd667601427b42b612d7ea6d7 /arch/mips/include/asm/ptrace.h
parent9e2d8656f5e8aa214e66b462680cf86b210b74a8 (diff)
UAPI: (Scripted) Disintegrate arch/mips/include/asm
Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Michael Kerrisk <mtk.manpages@gmail.com> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
Diffstat (limited to 'arch/mips/include/asm/ptrace.h')
-rw-r--r--arch/mips/include/asm/ptrace.h107
1 files changed, 1 insertions, 106 deletions
diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
index 4b7f5252d2fd..4f5da948a777 100644
--- a/arch/mips/include/asm/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
@@ -9,115 +9,12 @@
#ifndef _ASM_PTRACE_H
#define _ASM_PTRACE_H
-/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
-#define FPR_BASE 32
-#define PC 64
-#define CAUSE 65
-#define BADVADDR 66
-#define MMHI 67
-#define MMLO 68
-#define FPC_CSR 69
-#define FPC_EIR 70
-#define DSP_BASE 71 /* 3 more hi / lo register pairs */
-#define DSP_CONTROL 77
-#define ACX 78
-
-/*
- * This struct defines the way the registers are stored on the stack during a
- * system call/exception. As usual the registers k0/k1 aren't being saved.
- */
-struct pt_regs {
-#ifdef CONFIG_32BIT
- /* Pad bytes for argument save space on the stack. */
- unsigned long pad0[6];
-#endif
-
- /* Saved main processor registers. */
- unsigned long regs[32];
-
- /* Saved special registers. */
- unsigned long cp0_status;
- unsigned long hi;
- unsigned long lo;
-#ifdef CONFIG_CPU_HAS_SMARTMIPS
- unsigned long acx;
-#endif
- unsigned long cp0_badvaddr;
- unsigned long cp0_cause;
- unsigned long cp0_epc;
-#ifdef CONFIG_MIPS_MT_SMTC
- unsigned long cp0_tcstatus;
-#endif /* CONFIG_MIPS_MT_SMTC */
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
- unsigned long long mpl[3]; /* MTM{0,1,2} */
- unsigned long long mtp[3]; /* MTP{0,1,2} */
-#endif
-} __attribute__ ((aligned (8)));
-
-/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
-#define PTRACE_GETREGS 12
-#define PTRACE_SETREGS 13
-#define PTRACE_GETFPREGS 14
-#define PTRACE_SETFPREGS 15
-/* #define PTRACE_GETFPXREGS 18 */
-/* #define PTRACE_SETFPXREGS 19 */
-
-#define PTRACE_OLDSETOPTIONS 21
-
-#define PTRACE_GET_THREAD_AREA 25
-#define PTRACE_SET_THREAD_AREA 26
-
-/* Calls to trace a 64bit program from a 32bit program. */
-#define PTRACE_PEEKTEXT_3264 0xc0
-#define PTRACE_PEEKDATA_3264 0xc1
-#define PTRACE_POKETEXT_3264 0xc2
-#define PTRACE_POKEDATA_3264 0xc3
-#define PTRACE_GET_THREAD_AREA_3264 0xc4
-
-/* Read and write watchpoint registers. */
-enum pt_watch_style {
- pt_watch_style_mips32,
- pt_watch_style_mips64
-};
-struct mips32_watch_regs {
- unsigned int watchlo[8];
- /* Lower 16 bits of watchhi. */
- unsigned short watchhi[8];
- /* Valid mask and I R W bits.
- * bit 0 -- 1 if W bit is usable.
- * bit 1 -- 1 if R bit is usable.
- * bit 2 -- 1 if I bit is usable.
- * bits 3 - 11 -- Valid watchhi mask bits.
- */
- unsigned short watch_masks[8];
- /* The number of valid watch register pairs. */
- unsigned int num_valid;
-} __attribute__((aligned(8)));
-
-struct mips64_watch_regs {
- unsigned long long watchlo[8];
- unsigned short watchhi[8];
- unsigned short watch_masks[8];
- unsigned int num_valid;
-} __attribute__((aligned(8)));
-
-struct pt_watch_regs {
- enum pt_watch_style style;
- union {
- struct mips32_watch_regs mips32;
- struct mips64_watch_regs mips64;
- };
-};
-
-#define PTRACE_GET_WATCH_REGS 0xd0
-#define PTRACE_SET_WATCH_REGS 0xd1
-
-#ifdef __KERNEL__
#include <linux/compiler.h>
#include <linux/linkage.h>
#include <linux/types.h>
#include <asm/isadep.h>
+#include <uapi/asm/ptrace.h>
struct task_struct;
@@ -164,6 +61,4 @@ static inline void die_if_kernel(const char *str, struct pt_regs *regs)
die(str, regs);
}
-#endif
-
#endif /* _ASM_PTRACE_H */