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authorLinus Torvalds <torvalds@linux-foundation.org>2009-01-12 16:25:35 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2009-01-12 16:25:35 -0800
commit9219a3b9889dbc7dae68e472f239672ff48860b0 (patch)
treec6446d63dd7ffb0f118804e354eee3d80041717e /arch/mips/include/asm/time.h
parent23ead7291269db3be71b442324381c8d63e5d0b3 (diff)
parentcde15b5927fea3e1b4de0b277008cf273d8b000b (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (37 commits) MIPS: Only write c0_framemask on CPUs which have this register. MIPS: Alchemy: new userspace suspend interface for development boards. MIPS: Alchemy: dbdma suspend/resume support. MIPS: Alchemy: Fix up PM code on Au1550/Au1200 MIPS: Alchemy: move calc_clock function. MIPS: Alchemy: RTC counter clocksource / clockevent support. MIPS: make cp0 counter clocksource/event usable as fallback. MIPS: Alchemy: remove cpu_table. MIPS: Alchemy: remove get/set_au1x00_lcd_clock(). MIPS: Print irq handler description MIPS: Alchemy: pb1200: update CPLD cascade irq handler. MIPS: Alchemy: update core interrupt code. MIPS: Alchemy: move commandline mangling out of common code MIPS: Alchemy: devboards: consolidate files MIPS: Alchemy: Move development board code to common subdirectory MIPS: Add Cavium OCTEON to arch/mips/Kconfig MIPS: Add defconfig for Cavium OCTEON. MIPS: Adjust the dma-common.c platform hooks. MIPS: Add Cavium OCTEON slot into proper tlb category. MIPS: Compute branch returns for Cavium OCTEON specific branch instructions. ...
Diffstat (limited to 'arch/mips/include/asm/time.h')
-rw-r--r--arch/mips/include/asm/time.h24
1 files changed, 16 insertions, 8 deletions
diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h
index 9601ea950542..38a30d2ee959 100644
--- a/arch/mips/include/asm/time.h
+++ b/arch/mips/include/asm/time.h
@@ -50,27 +50,35 @@ extern int (*perf_irq)(void);
/*
* Initialize the calling CPU's compare interrupt as clockevent device
*/
-#ifdef CONFIG_CEVT_R4K
-extern int mips_clockevent_init(void);
+#ifdef CONFIG_CEVT_R4K_LIB
extern unsigned int __weak get_c0_compare_int(void);
-#else
+extern int r4k_clockevent_init(void);
+#endif
+
static inline int mips_clockevent_init(void)
{
+#ifdef CONFIG_CEVT_R4K
+ return r4k_clockevent_init();
+#else
return -ENXIO;
-}
#endif
+}
/*
* Initialize the count register as a clocksource
*/
-#ifdef CONFIG_CSRC_R4K
-extern int init_mips_clocksource(void);
-#else
+#ifdef CONFIG_CSRC_R4K_LIB
+extern int init_r4k_clocksource(void);
+#endif
+
static inline int init_mips_clocksource(void)
{
+#ifdef CONFIG_CSRC_R4K
+ return init_r4k_clocksource();
+#else
return 0;
-}
#endif
+}
extern void clocksource_set_clock(struct clocksource *cs, unsigned int clock);
extern void clockevent_set_clock(struct clock_event_device *cd,