Merge branch 'mips-for-linux-next' of git://git.linux-mips.org/pub/scm/ralf/upstream-sfr

Pull MIPS updates from Ralf Baechle:
 - Support for Imgtec's Aptiv family of MIPS cores.
 - Improved detection of BCM47xx configurations.
 - Fix hiberation for certain configurations.
 - Add support for the Chinese Loongson 3 CPU, a MIPS64 R2 core and
   systems.
 - Detection and support for the MIPS P5600 core.
 - A few more random fixes that didn't make 3.14.
 - Support for the EVA Extended Virtual Addressing
 - Switch Alchemy to the platform PATA driver
 - Complete unification of Alchemy support
 - Allow availability of I/O cache coherency to be runtime detected
 - Improvments to multiprocessing support for Imgtec platforms
 - A few microoptimizations
 - Cleanups of FPU support
 - Paul Gortmaker's fixes for the init stuff
 - Support for seccomp

* 'mips-for-linux-next' of git://git.linux-mips.org/pub/scm/ralf/upstream-sfr: (165 commits)
  MIPS: CPC: Use __raw_ memory access functions
  MIPS: CM: use __raw_ memory access functions
  MIPS: Fix warning when including smp-ops.h with CONFIG_SMP=n
  MIPS: Malta: GIC IPIs may be used without MT
  MIPS: smp-mt: Use common GIC IPI implementation
  MIPS: smp-cmp: Remove incorrect core number probe
  MIPS: Fix gigaton of warning building with microMIPS.
  MIPS: Fix core number detection for MT cores
  MIPS: MT: core_nvpes function to retrieve VPE count
  MIPS: Provide empty mips_mt_set_cpuoptions when CONFIG_MIPS_MT=n
  MIPS: Lasat: Replace del_timer by del_timer_sync
  MIPS: Malta: Setup PM I/O region on boot
  MIPS: Loongson: Add a Loongson-3 default config file
  MIPS: Loongson 3: Add CPU hotplug support
  MIPS: Loongson 3: Add Loongson-3 SMP support
  MIPS: Loongson: Add Loongson-3 Kconfig options
  MIPS: Loongson: Add swiotlb to support All-Memory DMA
  MIPS: Loongson 3: Add serial port support
  MIPS: Loongson 3: Add IRQ init and dispatch support
  MIPS: Loongson 3: Add HT-linked PCI support
  ...

2 files changed, 29 insertions, 4 deletions

diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index f25181b19941..df6e775f3fef 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -8,6 +8,7 @@
  * Copyright (C) 1996, 2000 by Ralf Baechle
  * Copyright (C) 2006 by Thiemo Seufer
  * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ * Copyright (C) 2014 Imagination Technologies Ltd.
  */
 #ifndef _UAPI_ASM_INST_H
 #define _UAPI_ASM_INST_H
@@ -73,10 +74,16 @@ enum spec2_op {
 enum spec3_op {
 	ext_op, dextm_op, dextu_op, dext_op,
 	ins_op, dinsm_op, dinsu_op, dins_op,
-	lx_op = 0x0a,
-	bshfl_op = 0x20,
-	dbshfl_op = 0x24,
-	rdhwr_op = 0x3b
+	lx_op     = 0x0a, lwle_op   = 0x19,
+	lwre_op   = 0x1a, cachee_op = 0x1b,
+	sbe_op    = 0x1c, she_op    = 0x1d,
+	sce_op    = 0x1e, swe_op    = 0x1f,
+	bshfl_op  = 0x20, swle_op   = 0x21,
+	swre_op   = 0x22, prefe_op  = 0x23,
+	dbshfl_op = 0x24, lbue_op   = 0x28,
+	lhue_op   = 0x29, lbe_op    = 0x2c,
+	lhe_op    = 0x2d, lle_op    = 0x2e,
+	lwe_op    = 0x2f, rdhwr_op  = 0x3b
 };
 
 /*
@@ -592,6 +599,15 @@ struct v_format {				/* MDMX vector format */
 	;)))))))
 };
 
+struct spec3_format {   /* SPEC3 */
+	BITFIELD_FIELD(unsigned int opcode:6,
+	BITFIELD_FIELD(unsigned int rs:5,
+	BITFIELD_FIELD(unsigned int rt:5,
+	BITFIELD_FIELD(signed int simmediate:9,
+	BITFIELD_FIELD(unsigned int func:7,
+	;)))))
+};
+
 /*
  * microMIPS instruction formats (32-bit length)
  *
@@ -863,6 +879,7 @@ union mips_instruction {
 	struct b_format b_format;
 	struct ps_format ps_format;
 	struct v_format v_format;
+	struct spec3_format spec3_format;
 	struct fb_format fb_format;
 	struct fp0_format fp0_format;
 	struct mm_fp0_format mm_fp0_format;
diff --git a/arch/mips/include/uapi/asm/sigcontext.h b/arch/mips/include/uapi/asm/sigcontext.h
index 6c9906f59c6e..681c17603a48 100644
--- a/arch/mips/include/uapi/asm/sigcontext.h
+++ b/arch/mips/include/uapi/asm/sigcontext.h
@@ -12,6 +12,10 @@
 #include <linux/types.h>
 #include <asm/sgidefs.h>
 
+/* Bits which may be set in sc_used_math */
+#define USEDMATH_FP	(1 << 0)
+#define USEDMATH_MSA	(1 << 1)
+
 #if _MIPS_SIM == _MIPS_SIM_ABI32
 
 /*
@@ -37,6 +41,8 @@ struct sigcontext {
 	unsigned long		sc_lo2;
 	unsigned long		sc_hi3;
 	unsigned long		sc_lo3;
+	unsigned long long	sc_msaregs[32];	/* Most significant 64 bits */
+	unsigned long		sc_msa_csr;
 };
 
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
@@ -70,6 +76,8 @@ struct sigcontext {
 	__u32	sc_used_math;
 	__u32	sc_dsp;
 	__u32	sc_reserved;
+	__u64	sc_msaregs[32];
+	__u32	sc_msa_csr;
 };