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authorJohn Crispin <blogic@openwrt.org>2013-04-14 09:55:29 +0200
committerRalf Baechle <ralf@linux-mips.org>2013-05-08 01:19:12 +0200
commit51e396078412ef91f222b9834f09308746ac7049 (patch)
tree1dd877360061d64510a6d3c3808b6059ec42bd3b /arch/mips/include
parentfe98f612a1ef5a7ca0ecd26530509ce129838995 (diff)
MIPS: ralink: add memory definition for MT7620
Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5183/
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/mach-ralink/mt7620.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-ralink/mt7620.h b/arch/mips/include/asm/mach-ralink/mt7620.h
index b272649933c9..9809972ea882 100644
--- a/arch/mips/include/asm/mach-ralink/mt7620.h
+++ b/arch/mips/include/asm/mach-ralink/mt7620.h
@@ -50,6 +50,14 @@
#define SYSCFG0_DRAM_TYPE_DDR1 1
#define SYSCFG0_DRAM_TYPE_DDR2 2
+#define MT7620_DRAM_BASE 0x0
+#define MT7620_SDRAM_SIZE_MIN 2
+#define MT7620_SDRAM_SIZE_MAX 64
+#define MT7620_DDR1_SIZE_MIN 32
+#define MT7620_DDR1_SIZE_MAX 128
+#define MT7620_DDR2_SIZE_MIN 32
+#define MT7620_DDR2_SIZE_MAX 256
+
#define MT7620_GPIO_MODE_I2C BIT(0)
#define MT7620_GPIO_MODE_UART0_SHIFT 2
#define MT7620_GPIO_MODE_UART0_MASK 0x7