summaryrefslogtreecommitdiff
path: root/arch/mips/kernel/cpu-probe.c
diff options
context:
space:
mode:
authorRalf Baechle <ralf@linux-mips.org>2013-06-26 17:06:34 +0200
committerRalf Baechle <ralf@linux-mips.org>2013-07-01 15:10:56 +0200
commit1990e5429c2149a30a81ff634215c1aa76560a89 (patch)
tree5362bc3d4fb96b32c43d01104968428487e7e685 /arch/mips/kernel/cpu-probe.c
parent0dad5d262278d24babbd62241fd238a3a3a0a39a (diff)
MIPS: Get rid of MIPS I flag and test macros.
MIPS I is the ancestor of all MIPS ISA and architecture variants. Anything ever build in the MIPS empire is either MIPS I or at least contains MIPS I. If it's running Linux, that is. So there is little point in having cpu_has_mips_1 because it will always evaluate as true - though usually only at runtime. Thus there is no point in having the MIPS_CPU_ISA_I ISA flag, so get rid of it. Little complication: traps.c was using a test for a pure MIPS I ISA as a test for an R3000-style cp0. To deal with that, use a check for cpu_has_3kex or cpu_has_4kex instead. cpu_has_3kex is a new macro. At the moment its default implementation is !cpu_has_4kex but this may eventually change if Linux is ever going to support the oddball MIPS processors R6000 and R8000 so users of either of these macros should not make any assumptions. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/5551/
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r--arch/mips/kernel/cpu-probe.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 265c97da6619..f87039dbefe9 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -146,8 +146,7 @@ static void __cpuinit set_isa(struct cpuinfo_mips *c, unsigned int isa)
case MIPS_CPU_ISA_IV:
c->isa_level |= MIPS_CPU_ISA_IV;
case MIPS_CPU_ISA_III:
- c->isa_level |= MIPS_CPU_ISA_I | MIPS_CPU_ISA_II |
- MIPS_CPU_ISA_III;
+ c->isa_level |= MIPS_CPU_ISA_II | MIPS_CPU_ISA_III;
break;
case MIPS_CPU_ISA_M32R2:
@@ -156,8 +155,6 @@ static void __cpuinit set_isa(struct cpuinfo_mips *c, unsigned int isa)
c->isa_level |= MIPS_CPU_ISA_M32R1;
case MIPS_CPU_ISA_II:
c->isa_level |= MIPS_CPU_ISA_II;
- case MIPS_CPU_ISA_I:
- c->isa_level |= MIPS_CPU_ISA_I;
break;
}
}
@@ -332,7 +329,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
case PRID_IMP_R2000:
c->cputype = CPU_R2000;
__cpu_name[cpu] = "R2000";
- set_isa(c, MIPS_CPU_ISA_I);
c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
MIPS_CPU_NOFPUEX;
if (__cpu_has_fpu())
@@ -352,7 +348,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
c->cputype = CPU_R3000;
__cpu_name[cpu] = "R3000";
}
- set_isa(c, MIPS_CPU_ISA_I);
c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
MIPS_CPU_NOFPUEX;
if (__cpu_has_fpu())
@@ -455,7 +450,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
break;
#endif
case PRID_IMP_TX39:
- set_isa(c, MIPS_CPU_ISA_I);
c->options = MIPS_CPU_TLB | MIPS_CPU_TX39_CACHE;
if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) {