Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (80 commits)
  [MIPS] tlbex.c: Cleanup __init usage.
  [MIPS] WRPPMC serial support move to platform device
  [MIPS] R1: Fix hazard barriers to make kernels work on R2 also.
  [MIPS] VPE: reimplement ELF loader.
  [MIPS] cleanup WRPPMC include files
  [MIPS] Add BUG_ON assertion for attempt to run kernel on the wrong CPU type.
  [MIPS] SMP: Use ISO C struct initializer for local structs.
  [MIPS] SMP: Kill useless casts.
  [MIPS] Kill num_online_cpus() loops.
  [MIPS] SMP: Implement smp_call_function_mask().
  [MIPS] Make facility to convert CPU types to strings generally available.
  [MIPS] Convert list of CPU types from #define to enum.
  [MIPS] Optimize get_unaligned / put_unaligned implementations.
  [MIPS] checkfiles: Fix "need space after that ','" errors.
  [MIPS] Fix "no space between function name and open parenthesis" warnings.
  [MIPS] Allow hardwiring of the CPU type to a single type for optimization.
  [MIPS] tlbex: Size optimize code by declaring a few functions inline.
  [MIPS] pg-r4k.c: Dump the generated code
  [MIPS] Cobalt: Remove cobalt_machine_power_off()
  [MIPS] Cobalt: Move reset port definition to arch/mips/cobalt/reset.c
  ...

1 files changed, 2 insertions, 2 deletions

diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 1ecdd50bfc60..4edc7e451d91 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -99,7 +99,7 @@ void ll_msc_irq(void)
 }
 
 void
-msc_bind_eic_interrupt (unsigned int irq, unsigned int set)
+msc_bind_eic_interrupt(unsigned int irq, unsigned int set)
 {
 	MSCIC_WRITE(MSC01_IC_RAMW,
 		    (irq<<MSC01_IC_RAMW_ADDR_SHF) | (set<<MSC01_IC_RAMW_DATA_SHF));
@@ -130,7 +130,7 @@ void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqma
 {
 	extern void (*board_bind_eic_interrupt)(unsigned int irq, unsigned int regset);
 
-	_icctrl_msc = (unsigned long) ioremap (icubase, 0x40000);
+	_icctrl_msc = (unsigned long) ioremap(icubase, 0x40000);
 
 	/* Reset interrupt controller - initialises all registers to 0 */
 	MSCIC_WRITE(MSC01_IC_RST, MSC01_IC_RST_RST_BIT);