diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2011-03-27 15:19:28 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2011-03-29 14:48:07 +0200 |
| commit | e4ec7989b4e55d9275ebac66230b7dac6dcb1fae (patch) | |
| tree | b42cd789681bada83b0051899ed66c1c0e2bbea2 /arch/mips/kernel/irq-msc01.c | |
| parent | 9efbc3fba2cd7f703b55d72e5168ed4348930442 (diff) | |
MIPS: Convert the irq functions to the new names
Scripted with coccinelle.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/mips/kernel/irq-msc01.c')
| -rw-r--r-- | arch/mips/kernel/irq-msc01.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index fc800cd9947e..0c6afeed89d2 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c @@ -137,16 +137,20 @@ void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqma switch (imp->im_type) { case MSC01_IRQ_EDGE: - set_irq_chip_and_handler_name(irqbase + n, - &msc_edgeirq_type, handle_edge_irq, "edge"); + irq_set_chip_and_handler_name(irqbase + n, + &msc_edgeirq_type, + handle_edge_irq, + "edge"); if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); else MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); break; case MSC01_IRQ_LEVEL: - set_irq_chip_and_handler_name(irqbase+n, - &msc_levelirq_type, handle_level_irq, "level"); + irq_set_chip_and_handler_name(irqbase + n, + &msc_levelirq_type, + handle_level_irq, + "level"); if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); else |