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authorJeff Garzik <jeff@garzik.org>2006-04-20 17:27:45 -0400
committerJeff Garzik <jeff@garzik.org>2006-04-20 17:27:45 -0400
commit9707b27100a48950f1e15e08a7c5028786e47f55 (patch)
tree5745b1e7497ae1499a2e2e9e0a567996419ab34f /arch/mips/kernel/irq-msc01.c
parent8fc65162a8f25929be80c8d6321a3479e92b5aae (diff)
parent402a26f0c040077ed6f941eefac5a6971f0d5f40 (diff)
Merge branch 'master'
Diffstat (limited to 'arch/mips/kernel/irq-msc01.c')
-rw-r--r--arch/mips/kernel/irq-msc01.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 3f653c7cfbf3..97ebdc754b9e 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -76,6 +76,11 @@ static void level_mask_and_ack_msc_irq(unsigned int irq)
mask_msc_irq(irq);
if (!cpu_has_veic)
MSCIC_WRITE(MSC01_IC_EOI, 0);
+#ifdef CONFIG_MIPS_MT_SMTC
+ /* This actually needs to be a call into platform code */
+ if (irq_hwmask[irq] & ST0_IM)
+ set_c0_status(irq_hwmask[irq] & ST0_IM);
+#endif /* CONFIG_MIPS_MT_SMTC */
}
/*
@@ -92,6 +97,10 @@ static void edge_mask_and_ack_msc_irq(unsigned int irq)
MSCIC_WRITE(MSC01_IC_SUP+irq*8, r | ~MSC01_IC_SUP_EDGE_BIT);
MSCIC_WRITE(MSC01_IC_SUP+irq*8, r);
}
+#ifdef CONFIG_MIPS_MT_SMTC
+ if (irq_hwmask[irq] & ST0_IM)
+ set_c0_status(irq_hwmask[irq] & ST0_IM);
+#endif /* CONFIG_MIPS_MT_SMTC */
}
/*