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| author | Ingo Molnar <mingo@kernel.org> | 2015-07-31 10:23:35 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2015-07-31 10:23:35 +0200 |
| commit | 5b929bd11df23922daf1be5d52731cc3900c1d79 (patch) | |
| tree | 105fa5987b03c9f4e0260a9eb04dff7bb3d16839 /arch/mips/kernel/traps.c | |
| parent | b2c51106c7581866c37ffc77c5d739f3d4b7cbc9 (diff) | |
| parent | 37868fe113ff2ba814b3b4eb12df214df555f8dc (diff) | |
Merge branch 'x86/urgent' into x86/asm, before applying dependent patches
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/mips/kernel/traps.c')
| -rw-r--r-- | arch/mips/kernel/traps.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 2a7b38ed23f0..e207a43b5f8f 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -2130,10 +2130,10 @@ void per_cpu_trap_init(bool is_boot_cpu) BUG_ON(current->mm); enter_lazy_tlb(&init_mm, current); - /* Boot CPU's cache setup in setup_arch(). */ - if (!is_boot_cpu) - cpu_cache_init(); - tlb_init(); + /* Boot CPU's cache setup in setup_arch(). */ + if (!is_boot_cpu) + cpu_cache_init(); + tlb_init(); TLBMISS_HANDLER_SETUP(); } |