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authorRalf Baechle <ralf@linux-mips.org>2008-10-28 17:38:42 +0000
committerRalf Baechle <ralf@linux-mips.org>2008-10-30 14:44:34 +0000
commitba3049ed4086737dab200b6087138a4b8e06915d (patch)
tree78a665064e6cc288bb34ef20cd543c2feb204838 /arch/mips/kernel/unaligned.c
parent076c6e4f4d81113615f50e5bc2c569f628bcd54a (diff)
MIPS: Switch FPU emulator trap to BREAK instruction.
Arguably using the address error handler has always been ugly. But with processors that handle unaligned loads and stores in hardware the current mechanism ceases to work so switch it to a BREAK instruction and allocate break code 514 to the FPU emulator. Yoichi Yuasa provided a build fix for CONFIG_BUG=n. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Diffstat (limited to 'arch/mips/kernel/unaligned.c')
-rw-r--r--arch/mips/kernel/unaligned.c12
1 files changed, 0 insertions, 12 deletions
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index 20709669e592..bf4c4a979abb 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -499,22 +499,10 @@ sigill:
asmlinkage void do_ade(struct pt_regs *regs)
{
- extern int do_dsemulret(struct pt_regs *);
unsigned int __user *pc;
mm_segment_t seg;
/*
- * Address errors may be deliberately induced by the FPU emulator to
- * retake control of the CPU after executing the instruction in the
- * delay slot of an emulated branch.
- */
- /* Terminate if exception was recognized as a delay slot return */
- if (do_dsemulret(regs))
- return;
-
- /* Otherwise handle as normal */
-
- /*
* Did we catch a fault trying to load an instruction?
* Or are we running in MIPS16 mode?
*/