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authorMaciej W. Rozycki <macro@linux-mips.org>2007-10-17 11:51:39 +0100
committerRalf Baechle <ralf@linux-mips.org>2007-10-29 19:35:36 +0000
commit21b2aecaae3a46a13dbe775639e7d060bec033bd (patch)
treed0a1bed8b37ec3cf79ff08a47ebb1a820158ef90 /arch/mips/kernel/vmlinux.lds.S
parent62b14c24b10033591bbab16dea165d696a616f37 (diff)
[MIPS] c-r3k: Implement flush_cache_range()
Contrary to the belief of some, the R3000 and related processors did have caches, both a data and an instruction cache. Here is an implementation of r3k_flush_cache_page(), which is the processor-specific back-end for flush_cache_range(), done according to the spec in Documentation/cachetlb.txt. While at it, remove an unused local function: get_phys_page(), do some trivial formatting fixes and modernise debugging facilities. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/vmlinux.lds.S')
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