diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-01-10 09:00:55 -0800 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-01-10 09:00:55 -0800 |
commit | d936cfc72032fb4af03d1edd99596d18ea1f081c (patch) | |
tree | 6d524c57fbff717ba82c6f4925659f6ec901d45d /arch/mips/kernel | |
parent | 4f47707b056bd2e3627ef390557ee93d312daba5 (diff) | |
parent | adfc76419bff33542d4fd53dc7f24818f846f194 (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r-- | arch/mips/kernel/cpu-probe.c | 39 | ||||
-rw-r--r-- | arch/mips/kernel/process.c | 4 | ||||
-rw-r--r-- | arch/mips/kernel/ptrace.c | 8 | ||||
-rw-r--r-- | arch/mips/kernel/ptrace32.c | 8 | ||||
-rw-r--r-- | arch/mips/kernel/signal32.c | 2 | ||||
-rw-r--r-- | arch/mips/kernel/time.c | 32 | ||||
-rw-r--r-- | arch/mips/kernel/vpe.c | 8 |
7 files changed, 71 insertions, 30 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 5e1b08b00a33..fac48ad27b34 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -435,6 +435,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) } } +static char unknown_isa[] __initdata = KERN_ERR \ + "Unsupported ISA type, c0.config0: %d."; + static inline unsigned int decode_config0(struct cpuinfo_mips *c) { unsigned int config0; @@ -447,16 +450,37 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c) isa = (config0 & MIPS_CONF_AT) >> 13; switch (isa) { case 0: - c->isa_level = MIPS_CPU_ISA_M32; + switch ((config0 >> 10) & 7) { + case 0: + c->isa_level = MIPS_CPU_ISA_M32R1; + break; + case 1: + c->isa_level = MIPS_CPU_ISA_M32R2; + break; + default: + goto unknown; + } break; case 2: - c->isa_level = MIPS_CPU_ISA_M64; + switch ((config0 >> 10) & 7) { + case 0: + c->isa_level = MIPS_CPU_ISA_M64R1; + break; + case 1: + c->isa_level = MIPS_CPU_ISA_M64R2; + break; + default: + goto unknown; + } break; default: - panic("Unsupported ISA type, cp0.config0.at: %d.", isa); + goto unknown; } return config0 & MIPS_CONF_M; + +unknown: + panic(unknown_isa, config0); } static inline unsigned int decode_config1(struct cpuinfo_mips *c) @@ -568,7 +592,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c) break; case PRID_IMP_34K: c->cputype = CPU_34K; - c->isa_level = MIPS_CPU_ISA_M32; break; } } @@ -647,7 +670,7 @@ static inline void cpu_probe_philips(struct cpuinfo_mips *c) switch (c->processor_id & 0xff00) { case PRID_IMP_PR4450: c->cputype = CPU_PR4450; - c->isa_level = MIPS_CPU_ISA_M32; + c->isa_level = MIPS_CPU_ISA_M32R1; break; default: panic("Unknown Philips Core!"); /* REVISIT: die? */ @@ -690,8 +713,10 @@ __init void cpu_probe(void) if (c->options & MIPS_CPU_FPU) { c->fpu_id = cpu_get_fpu_id(); - if (c->isa_level == MIPS_CPU_ISA_M32 || - c->isa_level == MIPS_CPU_ISA_M64) { + if (c->isa_level == MIPS_CPU_ISA_M32R1 || + c->isa_level == MIPS_CPU_ISA_M32R2 || + c->isa_level == MIPS_CPU_ISA_M64R1 || + c->isa_level == MIPS_CPU_ISA_M64R2) { if (c->fpu_id & MIPS_FPIR_3D) c->ases |= MIPS_ASE_MIPS3D; } diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index dd725779d91f..0476a4dce14e 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -205,7 +205,7 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r) return 1; } -void dump_regs(elf_greg_t *gp, struct pt_regs *regs) +void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs) { int i; @@ -231,7 +231,7 @@ int dump_task_regs (struct task_struct *tsk, elf_gregset_t *regs) { struct thread_info *ti = tsk->thread_info; long ksp = (unsigned long)ti + THREAD_SIZE - 32; - dump_regs(&(*regs)[0], (struct pt_regs *) ksp - 1); + elf_dump_regs(&(*regs)[0], (struct pt_regs *) ksp - 1); return 1; } diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 510da5fda567..8d2549335304 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -280,12 +280,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) ret = -EIO; goto out; } - if (child->thread.dsp.used_dsp) { - dregs = __get_dsp_regs(child); - tmp = (unsigned long) (dregs[addr - DSP_BASE]); - } else { - tmp = -1; /* DSP registers yet used */ - } + dregs = __get_dsp_regs(child); + tmp = (unsigned long) (dregs[addr - DSP_BASE]); break; } case DSP_CONTROL: diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index 7e55457a491f..1f998bfde165 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c @@ -201,12 +201,8 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data) ret = -EIO; goto out_tsk; } - if (child->thread.dsp.used_dsp) { - dspreg_t *dregs = __get_dsp_regs(child); - tmp = (unsigned long) (dregs[addr - DSP_BASE]); - } else { - tmp = -1; /* DSP registers yet used */ - } + dspreg_t *dregs = __get_dsp_regs(child); + tmp = (unsigned long) (dregs[addr - DSP_BASE]); break; case DSP_CONTROL: if (!cpu_has_dsp) { diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c index c856dbc52abb..98b185bbc947 100644 --- a/arch/mips/kernel/signal32.c +++ b/arch/mips/kernel/signal32.c @@ -588,7 +588,7 @@ static inline int setup_sigcontext32(struct pt_regs *regs, err |= __put_user(regs->hi, &sc->sc_mdhi); err |= __put_user(regs->lo, &sc->sc_mdlo); if (cpu_has_dsp) { - err |= __put_user(rddsp(DSP_MASK), &sc->sc_hi1); + err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp); err |= __put_user(mfhi1(), &sc->sc_hi1); err |= __put_user(mflo1(), &sc->sc_lo1); err |= __put_user(mfhi2(), &sc->sc_hi2); diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 787ed541d442..7050b4ffffcd 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -507,14 +507,38 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) return IRQ_HANDLED; } +int null_perf_irq(struct pt_regs *regs) +{ + return 0; +} + +int (*perf_irq)(struct pt_regs *regs) = null_perf_irq; + +EXPORT_SYMBOL(null_perf_irq); +EXPORT_SYMBOL(perf_irq); + asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs) { + int r2 = cpu_has_mips_r2; + irq_enter(); kstat_this_cpu.irqs[irq]++; + /* + * Suckage alert: + * Before R2 of the architecture there was no way to see if a + * performance counter interrupt was pending, so we have to run the + * performance counter interrupt handler anyway. + */ + if (!r2 || (read_c0_cause() & (1 << 26))) + if (perf_irq(regs)) + goto out; + /* we keep interrupt disabled all the time */ - timer_interrupt(irq, NULL, regs); + if (!r2 || (read_c0_cause() & (1 << 30))) + timer_interrupt(irq, NULL, regs); +out: irq_exit(); } @@ -628,9 +652,9 @@ void __init time_init(void) mips_hpt_init = c0_hpt_init; } - if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32) || - (current_cpu_data.isa_level == MIPS_CPU_ISA_I) || - (current_cpu_data.isa_level == MIPS_CPU_ISA_II)) + if (cpu_has_mips32r1 || cpu_has_mips32r2 || + (current_cpu_data.isa_level == MIPS_CPU_ISA_I) || + (current_cpu_data.isa_level == MIPS_CPU_ISA_II)) /* * We need to calibrate the counter but we don't have * 64-bit division. diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 9c89eebc356f..ae83b755cf4a 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c @@ -99,9 +99,9 @@ struct vpe { /* elfloader stuff */ void *load_addr; - u32 len; + unsigned long len; char *pbuffer; - u32 plen; + unsigned long plen; unsigned long __start; @@ -253,11 +253,11 @@ void dump_mtregs(void) } /* Find some VPE program space */ -static void *alloc_progmem(u32 len) +static void *alloc_progmem(unsigned long len) { #ifdef CONFIG_MIPS_VPE_LOADER_TOM /* this means you must tell linux to use less memory than you physically have */ - return (void *)((max_pfn * PAGE_SIZE) + KSEG0); + return pfn_to_kaddr(max_pfn); #else // simple grab some mem for now return kmalloc(len, GFP_KERNEL); |