diff options
| author | David Daney <david.daney@cavium.com> | 2013-05-13 13:56:44 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-16 20:35:42 +0200 |
| commit | 48c4ac976ae995f263cde8f09578de86bc8e9f1d (patch) | |
| tree | 48e9b3753b951ea2c276546679264c3030a8ea7d /arch/mips/lib | |
| parent | 8ea6cd7af124ad070b44a7f60e225e45e3f38f79 (diff) | |
Revert "MIPS: Allow ASID size to be determined at boot time."
This reverts commit d532f3d26716a39dfd4b88d687bd344fbe77e390.
The original commit has several problems:
1) Doesn't work with 64-bit kernels.
2) Calls TLBMISS_HANDLER_SETUP() before the code is generated.
3) Calls TLBMISS_HANDLER_SETUP() twice in per_cpu_trap_init() when
only one call is needed.
[ralf@linux-mips.org: Also revert the bits of the ASID patch which were
hidden in the KVM merge.]
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: "Steven J. Hill" <Steven.Hill@imgtec.com>
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/5242/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/lib')
| -rw-r--r-- | arch/mips/lib/dump_tlb.c | 5 | ||||
| -rw-r--r-- | arch/mips/lib/r3k_dump_tlb.c | 7 |
2 files changed, 5 insertions, 7 deletions
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c index 8a12d00908e0..32b9f21bfd85 100644 --- a/arch/mips/lib/dump_tlb.c +++ b/arch/mips/lib/dump_tlb.c @@ -11,7 +11,6 @@ #include <asm/page.h> #include <asm/pgtable.h> #include <asm/tlbdebug.h> -#include <asm/mmu_context.h> static inline const char *msk2str(unsigned int mask) { @@ -56,7 +55,7 @@ static void dump_tlb(int first, int last) s_pagemask = read_c0_pagemask(); s_entryhi = read_c0_entryhi(); s_index = read_c0_index(); - asid = ASID_MASK(s_entryhi); + asid = s_entryhi & 0xff; for (i = first; i <= last; i++) { write_c0_index(i); @@ -86,7 +85,7 @@ static void dump_tlb(int first, int last) printk("va=%0*lx asid=%02lx\n", width, (entryhi & ~0x1fffUL), - ASID_MASK(entryhi)); + entryhi & 0xff); printk("\t[pa=%0*llx c=%d d=%d v=%d g=%d] ", width, (entrylo0 << 6) & PAGE_MASK, c0, diff --git a/arch/mips/lib/r3k_dump_tlb.c b/arch/mips/lib/r3k_dump_tlb.c index 8327698b9937..91615c2ef0cf 100644 --- a/arch/mips/lib/r3k_dump_tlb.c +++ b/arch/mips/lib/r3k_dump_tlb.c @@ -9,7 +9,6 @@ #include <linux/mm.h> #include <asm/mipsregs.h> -#include <asm/mmu_context.h> #include <asm/page.h> #include <asm/pgtable.h> #include <asm/tlbdebug.h> @@ -22,7 +21,7 @@ static void dump_tlb(int first, int last) unsigned int asid; unsigned long entryhi, entrylo0; - asid = ASID_MASK(read_c0_entryhi()); + asid = read_c0_entryhi() & 0xfc0; for (i = first; i <= last; i++) { write_c0_index(i<<8); @@ -36,7 +35,7 @@ static void dump_tlb(int first, int last) /* Unused entries have a virtual address of KSEG0. */ if ((entryhi & 0xffffe000) != 0x80000000 - && (ASID_MASK(entryhi) == asid)) { + && (entryhi & 0xfc0) == asid) { /* * Only print entries in use */ @@ -45,7 +44,7 @@ static void dump_tlb(int first, int last) printk("va=%08lx asid=%08lx" " [pa=%06lx n=%d d=%d v=%d g=%d]", (entryhi & 0xffffe000), - ASID_MASK(entryhi), + entryhi & 0xfc0, entrylo0 & PAGE_MASK, (entrylo0 & (1 << 11)) ? 1 : 0, (entrylo0 & (1 << 10)) ? 1 : 0, |