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authorRalf Baechle <ralf@linux-mips.org>2013-07-02 17:19:04 +0200
committerRalf Baechle <ralf@linux-mips.org>2013-07-12 18:11:43 +0200
commit6ac5310e649df5fcd240d764503bf16a1317ea39 (patch)
tree286700815b3f30dc13cc3b2d9980b0244b244d33 /arch/mips/loongson
parent704e6460ab75af0735b1ca7c0dcaa4ff0a4001b2 (diff)
parent3f90b82df110ef9cb33761b56ca85ae0d0372d4a (diff)
Merge branch '3.10-fixes' into mips-for-linux-next
This that should have been fixed but weren't, way to much, intrusive and late.
Diffstat (limited to 'arch/mips/loongson')
-rw-r--r--arch/mips/loongson/common/cs5536/cs5536_isa.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/mips/loongson/common/cs5536/cs5536_isa.c b/arch/mips/loongson/common/cs5536/cs5536_isa.c
index a6eb2e853d94..924be39e7733 100644
--- a/arch/mips/loongson/common/cs5536/cs5536_isa.c
+++ b/arch/mips/loongson/common/cs5536/cs5536_isa.c
@@ -13,6 +13,7 @@
* option) any later version.
*/
+#include <linux/pci.h>
#include <cs5536/cs5536.h>
#include <cs5536/cs5536_pci.h>
@@ -314,3 +315,16 @@ u32 pci_isa_read_reg(int reg)
return conf_data;
}
+
+/*
+ * The mfgpt timer interrupt is running early, so we must keep the south bridge
+ * mmio always enabled. Otherwise we may race with the PCI configuration which
+ * may temporarily disable it. When that happens and the timer interrupt fires,
+ * we are not able to clear it and the system will hang.
+ */
+static void cs5536_isa_mmio_always_on(struct pci_dev *dev)
+{
+ dev->mmio_always_on = 1;
+}
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA,
+ PCI_CLASS_BRIDGE_ISA, 8, cs5536_isa_mmio_always_on);