diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2008-06-12 17:26:02 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2008-06-16 15:14:47 +0100 |
| commit | 89052bd7b393434f7c573ce6a3b88c5f143586d2 (patch) | |
| tree | e68bf4c2b46ca1c33b0fa1b78da6ea2a4db3aff4 /arch/mips/mm/c-r4k.c | |
| parent | 330117ff2723566e8eb7ad43223081b557f1540e (diff) | |
[MIPS] Fix build for PNX platforms.
Build error was caused by commit 351336929ccf222ae38ff0cb7a8dd5fd5c6236a0.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
| -rw-r--r-- | arch/mips/mm/c-r4k.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 643c8bcffff3..c41ea2284954 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1226,6 +1226,28 @@ void au1x00_fixup_config_od(void) } } +/* CP0 hazard avoidance. */ +#define NXP_BARRIER() \ + __asm__ __volatile__( \ + ".set noreorder\n\t" \ + "nop; nop; nop; nop; nop; nop;\n\t" \ + ".set reorder\n\t") + +static void nxp_pr4450_fixup_config(void) +{ + unsigned long config0; + + config0 = read_c0_config(); + + /* clear all three cache coherency fields */ + config0 &= ~(0x7 | (7 << 25) | (7 << 28)); + config0 |= (((_page_cachable_default >> _CACHE_SHIFT) << 0) | + ((_page_cachable_default >> _CACHE_SHIFT) << 25) | + ((_page_cachable_default >> _CACHE_SHIFT) << 28)); + write_c0_config(config0); + NXP_BARRIER(); +} + static int __cpuinitdata cca = -1; static int __init cca_setup(char *str) @@ -1271,6 +1293,10 @@ static void __cpuinit coherency_setup(void) case CPU_AU1500: /* rev. AB */ au1x00_fixup_config_od(); break; + + case PRID_IMP_PR4450: + nxp_pr4450_fixup_config(); + break; } } |