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authorLinus Torvalds <torvalds@linux-foundation.org>2014-06-27 18:37:56 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2014-06-27 18:37:56 -0700
commitc9a606660e7bb5ba9169d279346417dab72b157d (patch)
treef9bf6e3227c89d0d1be1006075a82fbe8d9987e7 /arch/mips/mm/uasm-mips.c
parent1857a5b65c52be3e8837cc68d0ee3f4741c5c45f (diff)
parent16f0bbbc1fbe0d09cda5b5b2dbbd6716026dfa7b (diff)
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle: "This is dominated by a large number of changes necessary for the MIPS BPF code. code. Aside of that there are - a fix for the MSC system controller support code. - a Turbochannel fix. - a recordmcount fix that's MIPS-specific. - barrier fixes to smp-cps / pm-cps after unrelated changes elsewhere in the kernel. - revert support for MSA registers in the signal frames. The reverted patch did modify the signal stack frame which of course is inacceptable. - fix math-emu build breakage with older compilers. - some related cleanup. - fix Lasat build error if CONFIG_CRC32 isn't set to y by the user" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (27 commits) MIPS: Lasat: Fix build error if CRC32 is not enabled. TC: Handle device_register() errors. MIPS: MSC: Prevent out-of-bounds writes to MIPS SC ioremap'd region MIPS: bpf: Fix stack space allocation for BPF memwords on MIPS64 MIPS: BPF: Use 32 or 64-bit load instruction to load an address to register MIPS: bpf: Fix PKT_TYPE case for big-endian cores MIPS: BPF: Prevent kernel fall over for >=32bit shifts MIPS: bpf: Drop update_on_xread and always initialize the X register MIPS: bpf: Fix is_range() semantics MIPS: bpf: Use pr_debug instead of pr_warn for unhandled opcodes MIPS: bpf: Fix return values for VLAN_TAG_PRESENT case MIPS: bpf: Use correct mask for VLAN_TAG case MIPS: bpf: Fix branch conditional for BPF_J{GT/GE} cases MIPS: bpf: Add SEEN_SKB to flags when looking for the PKT_TYPE MIPS: bpf: Use 'andi' instead of 'and' for the VLAN cases MIPS: bpf: Return error code if the offset is a negative number MIPS: bpf: Use the LO register to get division's quotient MIPS: mm: uasm: Fix lh micro-assembler instruction MIPS: uasm: Add SLT uasm instruction MIPS: uasm: Add s3s1s2 instruction builder ...
Diffstat (limited to 'arch/mips/mm/uasm-mips.c')
-rw-r--r--arch/mips/mm/uasm-mips.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c
index 38792c2364f5..6708a2dbf934 100644
--- a/arch/mips/mm/uasm-mips.c
+++ b/arch/mips/mm/uasm-mips.c
@@ -89,7 +89,7 @@ static struct insn insn_table[] = {
{ insn_lb, M(lb_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_ld, M(ld_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_ldx, M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD },
- { insn_lh, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
+ { insn_lh, M(lh_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_lld, M(lld_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_ll, M(ll_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_lui, M(lui_op, 0, 0, 0, 0, 0), RT | SIMM },
@@ -110,6 +110,7 @@ static struct insn insn_table[] = {
{ insn_sd, M(sd_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE },
{ insn_sllv, M(spec_op, 0, 0, 0, 0, sllv_op), RS | RT | RD },
+ { insn_slt, M(spec_op, 0, 0, 0, 0, slt_op), RS | RT | RD },
{ insn_sltiu, M(sltiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_sltu, M(spec_op, 0, 0, 0, 0, sltu_op), RS | RT | RD },
{ insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE },