diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-06-25 12:30:10 +0200 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-06-25 12:30:10 +0200 |
commit | 28f73e51d0f64a5b896ad816ab8df6f3bcec5810 (patch) | |
tree | 8c51ad5ff74d6ef5d1d68121c9f9aadce836736e /arch/mips/nxp | |
parent | f3f3149f35b9195ef4b761b1353fc0766b5f53be (diff) | |
parent | 543cf4cb3fe6f6cae3651ba918b9c56200b257d0 (diff) |
Merge branch 'linus' into x86/delaytip-x86-delay-2008-06-25_10.30_Wed
Conflicts:
arch/x86/kernel/tsc_32.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/mips/nxp')
-rw-r--r-- | arch/mips/nxp/pnx8550/jbs/board_setup.c | 11 | ||||
-rw-r--r-- | arch/mips/nxp/pnx8550/stb810/board_setup.c | 10 |
2 files changed, 2 insertions, 19 deletions
diff --git a/arch/mips/nxp/pnx8550/jbs/board_setup.c b/arch/mips/nxp/pnx8550/jbs/board_setup.c index f92826e0096d..57dd903ca408 100644 --- a/arch/mips/nxp/pnx8550/jbs/board_setup.c +++ b/arch/mips/nxp/pnx8550/jbs/board_setup.c @@ -47,16 +47,7 @@ void __init board_setup(void) { - unsigned long config0, configpr; - - config0 = read_c0_config(); - - /* clear all three cache coherency fields */ - config0 &= ~(0x7 | (7<<25) | (7<<28)); - config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) | - (CONF_CM_DEFAULT<<28)); - write_c0_config(config0); - BARRIER; + unsigned long configpr; configpr = read_c0_config7(); configpr |= (1<<19); /* enable tlb */ diff --git a/arch/mips/nxp/pnx8550/stb810/board_setup.c b/arch/mips/nxp/pnx8550/stb810/board_setup.c index 1282c27cfcb7..af2a55e0b4e9 100644 --- a/arch/mips/nxp/pnx8550/stb810/board_setup.c +++ b/arch/mips/nxp/pnx8550/stb810/board_setup.c @@ -33,15 +33,7 @@ void __init board_setup(void) { - unsigned long config0, configpr; - - config0 = read_c0_config(); - - /* clear all three cache coherency fields */ - config0 &= ~(0x7 | (7<<25) | (7<<28)); - config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) | - (CONF_CM_DEFAULT<<28)); - write_c0_config(config0); + unsigned long configpr; configpr = read_c0_config7(); configpr |= (1<<19); /* enable tlb */ |