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authorKevin Hilman <khilman@linaro.org>2013-08-14 08:14:50 -0700
committerKevin Hilman <khilman@linaro.org>2013-08-14 08:14:50 -0700
commit080e3da4f4bf693ec59bd98eae3ee5bd5b1dd047 (patch)
tree2a367e97dcffe9ced54ff71b03ab893a3248fdb4 /arch/mips/pci/pci-ip27.c
parente91f24ae027a583f2faff84456fa2630144bfed8 (diff)
parent39c41df9c1950fba0ee6a4e7a63be281e89fe437 (diff)
Merge branch 'zynq/dt' into next/dt
* zynq/dt: (1054 commits) arm: zynq: dt: Set correct L2 ram latencies + v3.11-rc5 Conflicts: arch/arm/Makefile
Diffstat (limited to 'arch/mips/pci/pci-ip27.c')
-rw-r--r--arch/mips/pci/pci-ip27.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index 7b2ac81e1f59..162b4cb29dba 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -42,7 +42,7 @@ int irq_to_slot[MAX_PCI_BUSSES * MAX_DEVICES_PER_PCIBUS];
extern struct pci_ops bridge_pci_ops;
-int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)
+int bridge_probe(nasid_t nasid, int widget_id, int masterwid)
{
unsigned long offset = NODE_OFFSET(nasid);
struct bridge_controller *bc;