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authorLinus Torvalds <torvalds@linux-foundation.org>2009-05-14 19:19:43 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-05-14 19:19:43 -0700
commitc48f2295a96d12c1c57d4655890af9984d3c061c (patch)
tree9d7e96fd4307a896763b4658f33640423f3d244c /arch/mips/txx9/generic/setup_tx4927.c
parent5732c468495effd3089c1c893f3eba9a8a1d373c (diff)
parent5d81b83d03eb32085c569854695e102dde7af544 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (38 commits) MIPS: Sibyte: Fix locking in set_irq_affinity MIPS: Use force_sig when handling address errors. MIPS: Cavium: Add struct clocksource * argument to octeon_cvmcount_read() MIPS: Rewrite <asm/div64.h> to work with gcc 4.4.0. MIPS: Fix highmem. MIPS: Fix sign-extension bug in 32-bit kernel on 32-bit hardware. MIPS: MSP71xx: Remove the RAMROOT functions MIPS: Use -mno-check-zero-division MIPS: Set compiler options only after the compiler prefix has ben set. MIPS: IP27: Get rid of #ident. Gcc 4.4.0 doesn't like it. MIPS: uaccess: Switch lock annotations to might_fault(). MIPS: MSP71xx: Resolve use of non-existent GPIO routines in msp71xx reset MIPS: MSP71xx: Resolve multiple definition of plat_timer_setup MIPS: Make uaccess.h slightly more sparse friendly. MIPS: Make access_ok() sideeffect proof. MIPS: IP27: Fix clash with NMI_OFFSET from hardirq.h MIPS: Alchemy: Timer build fix MIPS: Kconfig: Delete duplicate definition of RWSEM_GENERIC_SPINLOCK. MIPS: Cavium: Add support for 8k and 32k page sizes. MIPS: TXx9: Fix possible overflow in clock calculations ...
Diffstat (limited to 'arch/mips/txx9/generic/setup_tx4927.c')
-rw-r--r--arch/mips/txx9/generic/setup_tx4927.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/txx9/generic/setup_tx4927.c b/arch/mips/txx9/generic/setup_tx4927.c
index 914e93c62639..1093549df1a8 100644
--- a/arch/mips/txx9/generic/setup_tx4927.c
+++ b/arch/mips/txx9/generic/setup_tx4927.c
@@ -88,7 +88,7 @@ void __init tx4927_setup(void)
{
int i;
__u32 divmode;
- int cpuclk = 0;
+ unsigned int cpuclk = 0;
u64 ccfg;
txx9_reg_res_init(TX4927_REV_PCODE(), TX4927_REG_BASE,