[MIPS] TXx9: Make single kernel can support multiple boards

Make single kernel can be used on RBTX4927/37/38.  Also make
some SoC-specific code independent from board-specific code.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

3 files changed, 55 insertions, 106 deletions

diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c
index f4984820251a..3971a061657a 100644
--- a/arch/mips/txx9/rbtx4938/irq.c
+++ b/arch/mips/txx9/rbtx4938/irq.c
@@ -66,6 +66,8 @@ IRQ  Device
 */
 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <asm/mipsregs.h>
+#include <asm/txx9/generic.h>
 #include <asm/txx9/rbtx4938.h>
 
 static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq);
@@ -80,26 +82,17 @@ static struct irq_chip toshiba_rbtx4938_irq_ioc_type = {
 	.unmask = toshiba_rbtx4938_irq_ioc_enable,
 };
 
-int
-toshiba_rbtx4938_irq_nested(int sw_irq)
+static int toshiba_rbtx4938_irq_nested(int sw_irq)
 {
 	u8 level3;
 
 	level3 = readb(rbtx4938_imstat_addr);
 	if (level3)
 		/* must use fls so onboard ATA has priority */
-		sw_irq = TOSHIBA_RBTX4938_IRQ_IOC_BEG + fls(level3) - 1;
-
+		sw_irq = RBTX4938_IRQ_IOC + fls(level3) - 1;
 	return sw_irq;
 }
 
-static struct irqaction toshiba_rbtx4938_irq_ioc_action = {
-	.handler = no_action,
-	.flags = 0,
-	.mask = CPU_MASK_NONE,
-	.name = TOSHIBA_RBTX4938_IOC_NAME,
-};
-
 /**********************************************************************************/
 /* Functions for ioc                                                              */
 /**********************************************************************************/
@@ -108,13 +101,12 @@ toshiba_rbtx4938_irq_ioc_init(void)
 {
 	int i;
 
-	for (i = TOSHIBA_RBTX4938_IRQ_IOC_BEG;
-	     i <= TOSHIBA_RBTX4938_IRQ_IOC_END; i++)
+	for (i = RBTX4938_IRQ_IOC;
+	     i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++)
 		set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type,
 					 handle_level_irq);
 
-	setup_irq(RBTX4938_IRQ_IOCINT,
-		  &toshiba_rbtx4938_irq_ioc_action);
+	set_irq_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq);
 }
 
 static void
@@ -123,7 +115,7 @@ toshiba_rbtx4938_irq_ioc_enable(unsigned int irq)
 	unsigned char v;
 
 	v = readb(rbtx4938_imask_addr);
-	v |= (1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG));
+	v |= (1 << (irq - RBTX4938_IRQ_IOC));
 	writeb(v, rbtx4938_imask_addr);
 	mmiowb();
 }
@@ -134,15 +126,33 @@ toshiba_rbtx4938_irq_ioc_disable(unsigned int irq)
 	unsigned char v;
 
 	v = readb(rbtx4938_imask_addr);
-	v &= ~(1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG));
+	v &= ~(1 << (irq - RBTX4938_IRQ_IOC));
 	writeb(v, rbtx4938_imask_addr);
 	mmiowb();
 }
 
-void __init arch_init_irq(void)
+static int rbtx4938_irq_dispatch(int pending)
 {
-	extern void tx4938_irq_init(void);
+	int irq;
+
+	if (pending & STATUSF_IP7)
+		irq = MIPS_CPU_IRQ_BASE + 7;
+	else if (pending & STATUSF_IP2) {
+		irq = txx9_irq();
+		if (irq == RBTX4938_IRQ_IOCINT)
+			irq = toshiba_rbtx4938_irq_nested(irq);
+	} else if (pending & STATUSF_IP1)
+		irq = MIPS_CPU_IRQ_BASE + 0;
+	else if (pending & STATUSF_IP0)
+		irq = MIPS_CPU_IRQ_BASE + 1;
+	else
+		irq = -1;
+	return irq;
+}
 
+void __init rbtx4938_irq_setup(void)
+{
+	txx9_irq_dispatch = rbtx4938_irq_dispatch;
 	/* Now, interrupt control disabled, */
 	/* all IRC interrupts are masked, */
 	/* all IRC interrupt mode are Low Active. */
diff --git a/arch/mips/txx9/rbtx4938/prom.c b/arch/mips/txx9/rbtx4938/prom.c
index 134fcc2dc7d2..fbb37458ddb2 100644
--- a/arch/mips/txx9/rbtx4938/prom.c
+++ b/arch/mips/txx9/rbtx4938/prom.c
@@ -11,34 +11,12 @@
  */
 
 #include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
 #include <linux/bootmem.h>
-
-#include <asm/addrspace.h>
 #include <asm/bootinfo.h>
-#include <asm/txx9/tx4938.h>
-
-void __init prom_init_cmdline(void)
-{
-	int argc = (int) fw_arg0;
-	char **argv = (char **) fw_arg1;
-	int i;
-
-	/* ignore all built-in args if any f/w args given */
-	if (argc > 1) {
-		*arcs_cmdline = '\0';
-	}
-
-	for (i = 1; i < argc; i++) {
-		if (i != 1) {
-			strcat(arcs_cmdline, " ");
-		}
-		strcat(arcs_cmdline, argv[i]);
-	}
-}
+#include <asm/txx9/generic.h>
+#include <asm/txx9/rbtx4938.h>
 
-void __init prom_init(void)
+void __init rbtx4938_prom_init(void)
 {
 	extern int tx4938_get_mem_size(void);
 	int msize;
@@ -48,25 +26,4 @@ void __init prom_init(void)
 
 	msize = tx4938_get_mem_size();
 	add_memory_region(0, msize << 20, BOOT_MEM_RAM);
-
-	return;
-}
-
-void __init prom_free_prom_memory(void)
-{
-}
-
-void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
-{
-	return;
-}
-
-const char *get_system_type(void)
-{
-	return "Toshiba RBTX4938";
-}
-
-char * __init prom_getcmdline(void)
-{
-	return &(arcs_cmdline[0]);
 }
diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c
index 144d2cada820..8306ba333dda 100644
--- a/arch/mips/txx9/rbtx4938/setup.c
+++ b/arch/mips/txx9/rbtx4938/setup.c
@@ -17,7 +17,6 @@
 #include <linux/console.h>
 #include <linux/pm.h>
 #include <linux/platform_device.h>
-#include <linux/clk.h>
 #include <linux/gpio.h>
 
 #include <asm/reboot.h>
@@ -147,9 +146,9 @@ static void __init rbtx4938_pci_setup(void)
 #define	SEEPROM3_CS	1	/* IOC */
 #define	SRTC_CS	2	/* IOC */
 
-#ifdef CONFIG_PCI
 static int __init rbtx4938_ethaddr_init(void)
 {
+#ifdef CONFIG_PCI
 	unsigned char dat[17];
 	unsigned char sum;
 	int i;
@@ -179,10 +178,9 @@ static int __init rbtx4938_ethaddr_init(void)
 		    platform_device_add(pdev))
 			platform_device_put(pdev);
 	}
+#endif /* CONFIG_PCI */
 	return 0;
 }
-device_initcall(rbtx4938_ethaddr_init);
-#endif /* CONFIG_PCI */
 
 static void __init rbtx4938_spi_setup(void)
 {
@@ -366,7 +364,7 @@ void __init tx4938_board_setup(void)
 #endif
 }
 
-void __init plat_time_init(void)
+static void __init rbtx4938_time_init(void)
 {
 	mips_hpt_frequency = txx9_cpu_clock / 2;
 	if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_TINTDIS)
@@ -375,7 +373,7 @@ void __init plat_time_init(void)
 				     txx9_gbus_clock / 2);
 }
 
-void __init plat_mem_setup(void)
+static void __init rbtx4938_mem_setup(void)
 {
 	unsigned long long pcfg;
 	char *argptr;
@@ -496,7 +494,6 @@ static int __init rbtx4938_ne_init(void)
 						res, ARRAY_SIZE(res));
 	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
 }
-device_initcall(rbtx4938_ne_init);
 
 /* GPIO support */
 
@@ -587,14 +584,13 @@ static int __init rbtx4938_spi_init(void)
 	return 0;
 }
 
-static int __init rbtx4938_arch_init(void)
+static void __init rbtx4938_arch_init(void)
 {
 	txx9_gpio_init(TX4938_PIO_REG & 0xfffffffffULL, 0, 16);
 	gpiochip_add(&rbtx4938_spi_gpio_chip);
 	rbtx4938_pci_setup();
-	return rbtx4938_spi_init();
+	rbtx4938_spi_init();
 }
-arch_initcall(rbtx4938_arch_init);
 
 /* Watchdog support */
 
@@ -614,38 +610,24 @@ static int __init rbtx4938_wdt_init(void)
 {
 	return txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL);
 }
-device_initcall(rbtx4938_wdt_init);
-
-/* Minimum CLK support */
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-	if (!strcmp(id, "spi-baseclk"))
-		return (struct clk *)(txx9_gbus_clock / 2 / 4);
-	if (!strcmp(id, "imbus_clk"))
-		return (struct clk *)(txx9_gbus_clock / 2);
-	return ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
-
-int clk_enable(struct clk *clk)
-{
-	return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_disable);
 
-unsigned long clk_get_rate(struct clk *clk)
+static void __init rbtx4938_device_init(void)
 {
-	return (unsigned long)clk;
+	rbtx4938_ethaddr_init();
+	rbtx4938_ne_init();
+	rbtx4938_wdt_init();
 }
-EXPORT_SYMBOL(clk_get_rate);
 
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
+struct txx9_board_vec rbtx4938_vec __initdata = {
+	.type = MACH_TOSHIBA_RBTX4938,
+	.system = "Toshiba RBTX4938",
+	.prom_init = rbtx4938_prom_init,
+	.mem_setup = rbtx4938_mem_setup,
+	.irq_setup = rbtx4938_irq_setup,
+	.time_init = rbtx4938_time_init,
+	.device_init = rbtx4938_device_init,
+	.arch_init = rbtx4938_arch_init,
+#ifdef CONFIG_PCI
+	.pci_map_irq = rbtx4938_pci_map_irq,
+#endif
+};