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| author | Maciej W. Rozycki <macro@imgtec.com> | 2017-06-16 00:06:19 +0100 |
|---|---|---|
| committer | Sasha Levin <alexander.levin@verizon.com> | 2017-09-10 10:59:19 -0400 |
| commit | 512a16d00d7ef5aabd24a25a5acaba533267b538 (patch) | |
| tree | f839711124a9ce9ffd8726b043262131b69bcd50 /arch/mips | |
| parent | a7fe941443006459e2148fe89ea52df83a915542 (diff) | |
MIPS: Actually decode JALX in `__compute_return_epc_for_insn'
[ Upstream commit a9db101b735a9d49295326ae41f610f6da62b08c ]
Complement commit fb6883e5809c ("MIPS: microMIPS: Support handling of
delay slots.") and actually decode the regular MIPS JALX major
instruction opcode, the handling of which has been added with the said
commit for EPC calculation in `__compute_return_epc_for_insn'.
Fixes: fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.")
Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # 3.9+
Patchwork: https://patchwork.linux-mips.org/patch/16394/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/kernel/branch.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c index fe376aa705c5..de4a83d55f76 100644 --- a/arch/mips/kernel/branch.c +++ b/arch/mips/kernel/branch.c @@ -556,6 +556,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, /* * These are unconditional and in j_format. */ + case jalx_op: case jal_op: regs->regs[31] = regs->cp0_epc + 8; case j_op: |