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authorJames Hogan <james.hogan@imgtec.com>2015-05-19 09:50:32 +0100
committerRalf Baechle <ralf@linux-mips.org>2015-06-21 21:52:32 +0200
commit137877e4327075d839f15776cb6865ee171f2175 (patch)
tree88538c7cf3e0ed997487418de965b09b13d36d42 /arch/mips
parent8ab6abcb6aa475f458a3a81a69cca17840daafd1 (diff)
MIPS: dump_tlb: Use tlbr hazard macros
Use the new tlb read hazard macros from <asm/hazards.h> rather than the local BARRIER() macro which uses 7 ops regardless of the kernel configuration. We use mtc0_tlbr_hazard for the hazard between mtc0 to the index register and the tlbr, and tlb_read_hazard for the hazard between the tlbr and the mfc0 of the TLB registers written by tlbr. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10074/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/lib/dump_tlb.c11
1 files changed, 3 insertions, 8 deletions
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c
index 32b9f21bfd85..a62dfacb60f7 100644
--- a/arch/mips/lib/dump_tlb.c
+++ b/arch/mips/lib/dump_tlb.c
@@ -7,6 +7,7 @@
#include <linux/kernel.h>
#include <linux/mm.h>
+#include <asm/hazards.h>
#include <asm/mipsregs.h>
#include <asm/page.h>
#include <asm/pgtable.h>
@@ -40,12 +41,6 @@ static inline const char *msk2str(unsigned int mask)
return "";
}
-#define BARRIER() \
- __asm__ __volatile__( \
- ".set\tnoreorder\n\t" \
- "nop;nop;nop;nop;nop;nop;nop\n\t" \
- ".set\treorder");
-
static void dump_tlb(int first, int last)
{
unsigned long s_entryhi, entryhi, asid;
@@ -59,9 +54,9 @@ static void dump_tlb(int first, int last)
for (i = first; i <= last; i++) {
write_c0_index(i);
- BARRIER();
+ mtc0_tlbr_hazard();
tlb_read();
- BARRIER();
+ tlb_read_hazard();
pagemask = read_c0_pagemask();
entryhi = read_c0_entryhi();
entrylo0 = read_c0_entrylo0();