diff options
| author | Len Brown <len.brown@intel.com> | 2006-01-27 17:18:29 -0500 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2006-01-27 17:18:29 -0500 |
| commit | 292dd876ee765c478b27c93cc51e93a558ed58bf (patch) | |
| tree | 5b740e93253295baee2a9c414a6c66d03d44a9ef /arch/parisc/kernel/cache.c | |
| parent | d4ec6c7cc9a15a7a529719bc3b84f46812f9842e (diff) | |
| parent | 9fdb62af92c741addbea15545f214a6e89460865 (diff) | |
Pull release into acpica branch
Diffstat (limited to 'arch/parisc/kernel/cache.c')
| -rw-r--r-- | arch/parisc/kernel/cache.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c index a065349aee37..d8a4ca021aac 100644 --- a/arch/parisc/kernel/cache.c +++ b/arch/parisc/kernel/cache.c @@ -29,9 +29,9 @@ #include <asm/processor.h> #include <asm/sections.h> -int split_tlb; -int dcache_stride; -int icache_stride; +int split_tlb __read_mostly; +int dcache_stride __read_mostly; +int icache_stride __read_mostly; EXPORT_SYMBOL(dcache_stride); @@ -45,29 +45,29 @@ DEFINE_SPINLOCK(pa_tlb_lock); EXPORT_SYMBOL(pa_tlb_lock); #endif -struct pdc_cache_info cache_info; +struct pdc_cache_info cache_info __read_mostly; #ifndef CONFIG_PA20 -static struct pdc_btlb_info btlb_info; +static struct pdc_btlb_info btlb_info __read_mostly; #endif #ifdef CONFIG_SMP void flush_data_cache(void) { - on_each_cpu((void (*)(void *))flush_data_cache_local, NULL, 1, 1); + on_each_cpu(flush_data_cache_local, NULL, 1, 1); } void flush_instruction_cache(void) { - on_each_cpu((void (*)(void *))flush_instruction_cache_local, NULL, 1, 1); + on_each_cpu(flush_instruction_cache_local, NULL, 1, 1); } #endif void flush_cache_all_local(void) { - flush_instruction_cache_local(); - flush_data_cache_local(); + flush_instruction_cache_local(NULL); + flush_data_cache_local(NULL); } EXPORT_SYMBOL(flush_cache_all_local); @@ -332,7 +332,7 @@ void clear_user_page_asm(void *page, unsigned long vaddr) } #define FLUSH_THRESHOLD 0x80000 /* 0.5MB */ -int parisc_cache_flush_threshold = FLUSH_THRESHOLD; +int parisc_cache_flush_threshold __read_mostly = FLUSH_THRESHOLD; void parisc_setup_cache_timing(void) { |