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authorMartyn Welch <martyn.welch@gefanuc.com>2008-10-01 09:32:39 +0100
committerKumar Gala <galak@kernel.crashing.org>2008-10-13 11:09:57 -0500
commit3a470247913e6537c453937720b61f4ecc3e39db (patch)
tree284e09ffda9f3513677464abd05020fb01f51196 /arch/powerpc/boot/dts
parent92ae954046b1434c8c11468893ed27c7c06f2c21 (diff)
powerpc: GE Fanuc's FPGA based PIC controller on the SBC610
Support for the SBC610 VPX Single Board Computer from GE Fanuc (PowerPC MPC8641D). A number of MPC8641D based route interrupts for on-board interrupts through a FPGA based interrupt controller, which is chained with the MPC8641D's mpic. This patch provides a basic driver to allow basic routing of interrupts to the mpic. Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts')
-rw-r--r--arch/powerpc/boot/dts/gef_sbc610.dts37
1 files changed, 33 insertions, 4 deletions
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index 80b79e4adc78..771a776d6101 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -67,6 +67,35 @@
reg = <0x0 0x40000000>; // set by uboot
};
+ localbus@fef05000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8641-localbus", "simple-bus";
+ reg = <0xf8005000 0x1000>;
+ interrupts = <19 2>;
+ interrupt-parent = <&mpic>;
+
+ ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
+ 1 0 0xe8000000 0x08000000 // Paged Flash 0
+ 2 0 0xe0000000 0x08000000 // Paged Flash 1
+ 3 0 0xfc100000 0x00020000 // NVRAM
+ 4 0 0xfc000000 0x00008000 // FPGA
+ 5 0 0xfc008000 0x00008000 // AFIX FPGA
+ 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
+ 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
+
+ gef_pic: pic@4,4000 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ compatible = "gef,fpga-pic";
+ reg = <0x4 0x4000 0x20>;
+ interrupts = <0x8
+ 0x9>;
+ interrupt-parent = <&mpic>;
+
+ };
+ };
+
soc@fef00000 {
#address-cells = <1>;
#size-cells = <1>;
@@ -150,13 +179,13 @@
reg = <0x24520 0x20>;
phy0: ethernet-phy@0 {
- interrupt-parent = <&mpic>;
- interrupts = <0x0 0x1>;
+ interrupt-parent = <&gef_pic>;
+ interrupts = <0x9 0x4>;
reg = <1>;
};
phy2: ethernet-phy@2 {
- interrupt-parent = <&mpic>;
- interrupts = <0x0 0x1>;
+ interrupt-parent = <&gef_pic>;
+ interrupts = <0x8 0x4>;
reg = <3>;
};
};