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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-07-16 19:36:57 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-08-20 10:12:28 +1000
commitc5a8c0c99f67ae8a784faafbaaea1529825796e2 (patch)
tree731b07d0ac0414dbeac5ce940fe59a04a8d63c3f /arch/powerpc/include/asm/reg.h
parentee43eb788b3a06425fffb912677e2e1c8b00dd3b (diff)
powerpc: Remove use of a second scratch SPRG in STAB code
The STAB code used on Power3 and RS/64 uses a second scratch SPRG to save a GPR in order to decide whether to go to do_stab_bolted_* or to handle a normal data access exception. This prevents our scheme of freeing SPRG3 which is user visible for user uses since we cannot use SPRG0 which, on RS/64, seems to be read-only for supervisor mode (like POWER4). This reworks the STAB exception entry to use the PACA as temporary storage instead. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/reg.h')
-rw-r--r--arch/powerpc/include/asm/reg.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index a8179cc99ac4..d17af2b3d4ce 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -654,7 +654,7 @@
* 64-bit server:
* - SPRG0 unused (reserved for HV on Power4)
* - SPRG1 scratch for exception vectors
- * - SPRG2 scratch for exception vectors
+ * - SPRG2 unused
*
* All 32-bit:
* - SPRG3 current thread_info pointer
@@ -707,7 +707,6 @@
#ifdef CONFIG_PPC_BOOK3S_64
#define SPRN_SPRG_SCRATCH0 SPRN_SPRG1
-#define SPRN_SPRG_SCRATCH1 SPRN_SPRG2
#endif
#ifdef CONFIG_PPC_BOOK3S_32