diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2009-08-14 09:38:34 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-08-24 20:48:05 -0500 |
| commit | fc4bdb35fba1c8f464fd85b94a5059e752fc85d4 (patch) | |
| tree | 249a02a1515fb814d703215352e86de89f09dfbf /arch/powerpc/include/asm/reg_booke.h | |
| parent | 8934210cfe925f0d3e3089c69e9e88021324801b (diff) | |
powerpc/booke: Move MMUCSR definition into mmu-book3e.h
The MMUCSR is now defined as part of the Book-3E architecture so we
can move it into mmu-book3e.h and add some of the additional bits
defined by the architecture specs.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/reg_booke.h')
| -rw-r--r-- | arch/powerpc/include/asm/reg_booke.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 2c9c706e6448..9bb81d99b765 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h @@ -430,12 +430,6 @@ #define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */ #define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */ -/* Bit definitions for MMUCSR0 */ -#define MMUCSR0_TLB1FI 0x00000002 /* TLB1 Flash invalidate */ -#define MMUCSR0_TLB0FI 0x00000004 /* TLB0 Flash invalidate */ -#define MMUCSR0_TLB2FI 0x00000040 /* TLB2 Flash invalidate */ -#define MMUCSR0_TLB3FI 0x00000020 /* TLB3 Flash invalidate */ - /* Bit definitions for SGR. */ #define SGR_NORMAL 0 /* Speculative fetching allowed. */ #define SGR_GUARDED 1 /* Speculative fetching disallowed. */ |