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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-04-14 22:32:02 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-04-27 13:02:10 +1000
commitbd491781097f150687906008d639936a0c00ed90 (patch)
tree96a6926005c6765724fce93b0b27e504cd0172df /arch/powerpc/mm/mmu_context_nohash.c
parent76b4eda866c4936af8d696f040abea56bf688e16 (diff)
powerpc: Add TLB size detection for TYPE_3E MMUs
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/mm/mmu_context_nohash.c')
-rw-r--r--arch/powerpc/mm/mmu_context_nohash.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c
index 4d8fa911c73d..336807de550e 100644
--- a/arch/powerpc/mm/mmu_context_nohash.c
+++ b/arch/powerpc/mm/mmu_context_nohash.c
@@ -409,7 +409,17 @@ void __init mmu_context_init(void)
} else if (mmu_has_feature(MMU_FTR_TYPE_47x)) {
first_context = 1;
last_context = 65535;
- } else {
+ } else
+#ifdef CONFIG_PPC_BOOK3E_MMU
+ if (mmu_has_feature(MMU_FTR_TYPE_3E)) {
+ u32 mmucfg = mfspr(SPRN_MMUCFG);
+ u32 pid_bits = (mmucfg & MMUCFG_PIDSIZE_MASK)
+ >> MMUCFG_PIDSIZE_SHIFT;
+ first_context = 1;
+ last_context = (1UL << (pid_bits + 1)) - 1;
+ } else
+#endif
+ {
first_context = 1;
last_context = 255;
}