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authorMichael Ellerman <mpe@ellerman.id.au>2016-06-01 16:34:37 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2016-06-14 13:58:26 +1000
commit027dfac694fc27ef0273afb810d9b1f9da57d6e1 (patch)
treec248c02b9e5c4bf687639d19fd8f5fdcdfbcf445 /arch/powerpc/platforms/512x
parente289086f6530dd85d88967bfceded98bdbcd7f41 (diff)
powerpc: Various typo fixes
Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/platforms/512x')
-rw-r--r--arch/powerpc/platforms/512x/clock-commonclk.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c
index 6081fbd75330..add5a5374fa0 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -719,7 +719,7 @@ static void mpc512x_clk_setup_clock_tree(struct device_node *np, int busfreq)
* most one of a mux, div, and gate each into one 'struct clk'
* item
* - PSC/MSCAN/SPDIF clock generation OTOH already is very
- * specific and cannot get mapped to componsites (at least not
+ * specific and cannot get mapped to composites (at least not
* a single one, maybe two of them, but then some of these
* intermediate clock signals get referenced elsewhere (e.g.
* in the clock frequency measurement, CFM) and thus need